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aa5b9c0f6f
be deleted. This will be reapplied as soon as possible and before the 3.6 branch date at any rate. Approved by Jim Grosbach, Lang Hames, Rafael Espindola. This reverts commits r215111, 215115, 215116, 215117, 215136. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215154 91177308-0d34-0410-b5e6-96231b3b80d8
52 lines
1.5 KiB
C++
52 lines
1.5 KiB
C++
//===-- X86TargetMachine.h - Define TargetMachine for the X86 ---*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the X86 specific subclass of TargetMachine.
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//
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//===----------------------------------------------------------------------===//
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#ifndef X86TARGETMACHINE_H
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#define X86TARGETMACHINE_H
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#include "X86InstrInfo.h"
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#include "X86Subtarget.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/Target/TargetMachine.h"
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namespace llvm {
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class StringRef;
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class X86TargetMachine final : public LLVMTargetMachine {
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virtual void anchor();
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X86Subtarget Subtarget;
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public:
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X86TargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS, const TargetOptions &Options,
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Reloc::Model RM, CodeModel::Model CM,
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CodeGenOpt::Level OL);
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const X86Subtarget *getSubtargetImpl() const override { return &Subtarget; }
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X86Subtarget *getSubtargetImpl() {
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return static_cast<X86Subtarget *>(TargetMachine::getSubtargetImpl());
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}
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/// \brief Register X86 analysis passes with a pass manager.
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void addAnalysisPasses(PassManagerBase &PM) override;
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// Set up the pass pipeline.
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TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
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bool addCodeEmitter(PassManagerBase &PM, JITCodeEmitter &JCE) override;
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};
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} // End llvm namespace
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#endif
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