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4cd59eb629
Most are redundant, and they never seem to fire. The V128 integer patterns already exist in the INS multiclass. The duplicates only fire when the vector index type isn't i64, because they accept "imm" instead of an explicit "i64", as the instruction definition patterns do. TLI::getVectorIdxTy is i64 on AArch64, so this should never happen. Also, one of them had a typo: for i64, INSvi32lane was used. I noticed because I mistakenly used an explicit i32 as the idx type, and got ins.s for an i64 vector_insert. The V64 patterns also don't seem to ever fire, as V64 vector extract/insert are legalized to V128. The equivalent float patterns are unique and useful, so keep them. No functional change intended; none exhibited on the LIT and LNT tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231838 91177308-0d34-0410-b5e6-96231b3b80d8 |
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