Jim Grosbach e1cf5902ec ARM SRS instruction parsing, diassembly and encoding support. ... Fix the instruction encoding for operands. Refactor mode to use explicit instruction definitions per FIXME to be more consistent with loads/stores. Fix disassembler accordingly. Add tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136509 91177308-0d34-0410-b5e6-96231b3b80d8		2011-07-29 20:26:09 +00:00
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CodeGen	Fix two tests that I crashed in the previous commits. The mask elts	2011-07-29 02:05:28 +00:00
DebugInfo
ExecutionEngine
Feature	Merge the contents from exception-handling-rewrite to the mainline.	2011-07-27 20:18:04 +00:00
FrontendC++	Due to changes coming from the new LLVM type system, you now get	2011-07-28 12:21:47 +00:00
FrontendObjC
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Integer
lib
Linker	fix rdar://9776316 - type remapping needed for inline asm blobs,	2011-07-15 23:18:40 +00:00
LLVMC
MC	ARM SRS instruction parsing, diassembly and encoding support.	2011-07-29 20:26:09 +00:00
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Transforms	Clean up debug info after reassociation.	2011-07-29 19:00:35 +00:00
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