llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-24 06:30:19 +00:00

History

Misha Brukman d8e6e7f563 * Add baseline structural JIT code, but disable the JIT to allow llvm-gcc builds - Support added for functions, basic blocks, constant pool, constants, registers, and some basic support for globals, all untested * Turn assert()s into abort()s so that unimplemented functions fail in release git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17143 91177308-0d34-0410-b5e6-96231b3b80d8		2004-10-19 19:49:42 +00:00
..
DelaySlotFiller.cpp	Use TargetMachine::hasDelaySlot() instead of our old switch statement	2004-09-30 04:04:47 +00:00
FPMover.cpp	Pass which converts FpMOVD (double move pseudoinstructions) to pairs	2004-09-29 03:24:34 +00:00
Makefile	Generate the SparcV8 code emitter from .td files	2004-10-14 21:57:19 +00:00
README.txt	Add list of libc procedures we'll use, at some point.	2004-10-14 19:39:33 +00:00
SparcV8.h	Add createSparcV8FPMoverPass().	2004-09-29 03:25:39 +00:00
SparcV8.td	Prettify formatting of the file, adjust paths to making V8 a subdir of Sparc	2004-09-22 20:09:29 +00:00
SparcV8AsmPrinter.cpp	Don't use .quad to output double constants. The assembler must have a bug or	2004-09-29 19:59:06 +00:00
SparcV8CodeEmitter.cpp	* Add baseline structural JIT code, but disable the JIT to allow llvm-gcc builds	2004-10-19 19:49:42 +00:00
SparcV8InstrFormats.td	Class F2_1 already inherits the imm22 field from class F2	2004-10-14 22:32:24 +00:00
SparcV8InstrInfo.cpp	Recognize FpMOVD as a move.	2004-09-29 16:45:47 +00:00
SparcV8InstrInfo.h
SparcV8InstrInfo.td	The field is called `imm22', not simply` imm'	2004-10-14 22:33:32 +00:00
SparcV8ISelSimple.cpp	Add support for unreachable and undef	2004-10-17 02:42:42 +00:00
SparcV8JITInfo.h
SparcV8RegisterInfo.cpp	Implement eliminateCallFramePseudoInstr().	2004-10-10 19:57:21 +00:00
SparcV8RegisterInfo.h	Code insertion methods now return void instead of an int.	2004-08-15 22:15:11 +00:00
SparcV8RegisterInfo.td	SparcV8 int regs are not only 32-bits in width, but they are 32-bit aligned!	2004-09-27 18:22:18 +00:00
SparcV8TargetMachine.cpp	Implement getModuleMatchQuality and getJITMatchQuality so that v8 will be the	2004-10-09 05:57:01 +00:00
SparcV8TargetMachine.h	Implement getModuleMatchQuality and getJITMatchQuality so that v8 will be the	2004-10-09 05:57:01 +00:00

README.txt

SparcV8 backend skeleton
------------------------

This directory houses a 32-bit SPARC V8 backend employing a expander-based
instruction selector.  It is not yet functionally complete.  Watch
this space for more news coming soon!

Current expected test failures
------------------------------

SingleSource/Benchmarks: 
fldry heapsort objinst Oscar Queens chomp misr pi whetstone

SingleSource/UnitTests:
C++Catch SimpleC++Test 2002-05-02-ArgumentTest 2002-05-02-ManyArguments
2002-05-03-NotTest 2002-05-19-DivTest 2002-10-12-StructureArgs
2002-10-12-StructureArgsSimple 2003-05-07-VarArgs 2003-05-26-Shorts
2003-05-31-CastToBool 2003-05-31-LongShifts 2003-07-09-LoadShorts
2003-07-09-SignedArgs 2003-08-05-CastFPToUint 2003-08-11-VaListArg
StructModifyTest

To-do
-----

* support calling functions with more than 6 args
* support 64-bit integer (long, ulong) arguments to functions
  - use libc procedures instead of open-coding for:
    __div64 __mul64 __rem64 __udiv64 __umul64 __urem64
* support setcc on longs
* support basic binary operations on longs
* support casting <=32-bit integers, bools to long
* support casting 64-bit integers to FP types

$Date$