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https://github.com/c64scene-ar/llvm-6502.git
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d950941e13
Generate code for the Blackfin family of DSPs from Analog Devices: http://www.analog.com/en/embedded-processing-dsp/blackfin/processors/index.html We aim to be compatible with the exsisting GNU toolchain found at: http://blackfin.uclinux.org/gf/project/toolchain The back-end is experimental. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77897 91177308-0d34-0410-b5e6-96231b3b80d8
37 lines
669 B
LLVM
37 lines
669 B
LLVM
; RUN: llvm-as < %s | llc -march=bfin
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define i16 @add(i16 %A, i16 %B) {
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%R = add i16 %A, %B ; <i16> [#uses=1]
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ret i16 %R
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}
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define i16 @sub(i16 %A, i16 %B) {
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%R = sub i16 %A, %B ; <i16> [#uses=1]
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ret i16 %R
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}
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define i16 @mul(i16 %A, i16 %B) {
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%R = mul i16 %A, %B ; <i16> [#uses=1]
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ret i16 %R
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}
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define i16 @sdiv(i16 %A, i16 %B) {
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%R = sdiv i16 %A, %B ; <i16> [#uses=1]
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ret i16 %R
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}
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define i16 @udiv(i16 %A, i16 %B) {
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%R = udiv i16 %A, %B ; <i16> [#uses=1]
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ret i16 %R
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}
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define i16 @srem(i16 %A, i16 %B) {
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%R = srem i16 %A, %B ; <i16> [#uses=1]
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ret i16 %R
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}
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define i16 @urem(i16 %A, i16 %B) {
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%R = urem i16 %A, %B ; <i16> [#uses=1]
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ret i16 %R
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}
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