mirror of
https://github.com/c64scene-ar/llvm-6502.git
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4da992aeba
mostly based on the ARM AsmParser at this time and is not particularly
functional.
Changed the MBlaze data layout from:
"E-p:32:32-i8:8:8-i16:16:16-i64:32:32-f64:32:32-v64:32:32-v128:32:32-n32"
to:
"E-p:32:32:32-i8:8:8-i16:16:16"
because the MicroBlaze doesn't have i64, f64, v64, or v128 data types.
Cleaned up the MBlaze source code:
1. The floating point register class has been removed. The
MicroBlaze does not have floating point registers. Floating
point values are simply stored in integer registers.
2. Renaming the CPURegs register class to GPR to reflect the
standard naming.
3. Removing a lot of stale code from AsmPrinter after
the conversion to InstPrinter.
4. Simplified sign extended loads by marking them as
expanded in ISelLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117054 91177308-0d34-0410-b5e6-96231b3b80d8
25 lines
907 B
Makefile
25 lines
907 B
Makefile
##===- lib/Target/MBlaze/Makefile --------------------------*- Makefile -*-===##
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#
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# The LLVM Compiler Infrastructure
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#
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# This file is distributed under the University of Illinois Open Source
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# License. See LICENSE.TXT for details.
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#
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##===----------------------------------------------------------------------===##
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LEVEL = ../../..
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LIBRARYNAME = LLVMMBlazeCodeGen
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TARGET = MBlaze
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# Make sure that tblgen is run, first thing.
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BUILT_SOURCES = MBlazeGenRegisterInfo.h.inc MBlazeGenRegisterNames.inc \
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MBlazeGenRegisterInfo.inc MBlazeGenInstrNames.inc \
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MBlazeGenInstrInfo.inc MBlazeGenAsmWriter.inc \
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MBlazeGenDAGISel.inc MBlazeGenAsmMatcher.inc \
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MBlazeGenCodeEmitter.inc MBlazeGenCallingConv.inc \
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MBlazeGenSubtarget.inc MBlazeGenIntrinsics.inc
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DIRS = InstPrinter AsmParser TargetInfo
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include $(LEVEL)/Makefile.common
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