Jingyue Wu 4e04297ac3 [NVPTX] run SROA after NVPTXFavorNonGenericAddrSpaces ... Summary: This cleans up most allocas NVPTXLowerKernelArgs emits for byval parameters. Test Plan: makes bug21465.ll more stronger to verify no redundant local load/store. Reviewers: eliben, jholewinski Reviewed By: eliben, jholewinski Subscribers: jholewinski, llvm-commits Differential Revision: http://reviews.llvm.org/D10322 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239368 91177308-0d34-0410-b5e6-96231b3b80d8		2015-06-09 00:05:56 +00:00
..
AArch64	[GlobalMerge] Take into account minsize on Global users' parents.	2015-06-04 20:39:23 +00:00
ARM	[ARM] Pass a callback to FunctionPass constructors to enable skipping execution	2015-06-08 18:50:43 +00:00
BPF	[bpf] rename triple names bpf_be -> bpfeb	2015-06-05 16:11:14 +00:00
CPP
Generic	Resubmit r237954 (MIR Serialization: print and parse LLVM IR using MIR format).	2015-05-27 18:02:19 +00:00
Hexagon	[Hexagon] Adding functionality for searching for compound instruction pairs. Compound instructions reduce slot resource requirements freeing those packet slots up for more instructions.	2015-06-08 16:34:47 +00:00
Inputs
Mips	[mips] Make TTypeEncoding indirect to allow .eh_frame to be read-only.	2015-06-02 20:32:50 +00:00
MIR	MIR Serialization: use correct line and column numbers for LLVM IR errors.	2015-05-29 17:05:41 +00:00
MSP430
NVPTX	[NVPTX] run SROA after NVPTXFavorNonGenericAddrSpaces	2015-06-09 00:05:56 +00:00
PowerPC	Add support for VSX FMA single-precision instructions to the PPC back end	2015-05-29 17:13:25 +00:00
R600	DAGCombiner: don't duplicate (fmul x, c) in visitFNEG if fneg is free	2015-06-05 17:52:34 +00:00
SPARC
SystemZ
Thumb	Revert r238473, "Thumb2: Modify codegen for memcpy intrinsic to prefer LDM/STM."	2015-06-05 18:01:28 +00:00
Thumb2	ARM: Thumb2 LDRD/STRD supports independent input/output regs	2015-06-03 16:30:24 +00:00
WinEH
X86	[X86][SSE] Added lzcnt vector tests.	2015-06-08 19:58:43 +00:00
XCore