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https://github.com/c64scene-ar/llvm-6502.git
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27253 91177308-0d34-0410-b5e6-96231b3b80d8
302 lines
16 KiB
TableGen
302 lines
16 KiB
TableGen
//===- IntrinsicsX86.td - Defines X86 intrinsics -----------*- tablegen -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by Chris Lattner and is distributed under the
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// University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines all of the X86-specific intrinsics.
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// SSE1
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// Arithmetic ops
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_sse_add_ss : GCCBuiltin<"__builtin_ia32_addss">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_sub_ss : GCCBuiltin<"__builtin_ia32_subss">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_mul_ss : GCCBuiltin<"__builtin_ia32_mulss">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_div_ss : GCCBuiltin<"__builtin_ia32_divss">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_sqrt_ss : GCCBuiltin<"__builtin_ia32_sqrtss">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
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[InstrNoMem]>;
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def int_x86_sse_sqrt_ps : GCCBuiltin<"__builtin_ia32_sqrtps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
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[InstrNoMem]>;
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def int_x86_sse_rcp_ss : GCCBuiltin<"__builtin_ia32_rcpss">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
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[InstrNoMem]>;
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def int_x86_sse_rcp_ps : GCCBuiltin<"__builtin_ia32_rcpps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
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[InstrNoMem]>;
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def int_x86_sse_rsqrt_ss : GCCBuiltin<"__builtin_ia32_rsqrtss">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
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[InstrNoMem]>;
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def int_x86_sse_rsqrt_ps : GCCBuiltin<"__builtin_ia32_rsqrtps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
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[InstrNoMem]>;
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def int_x86_sse_min_ss : GCCBuiltin<"__builtin_ia32_minss">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_min_ps : GCCBuiltin<"__builtin_ia32_minps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_max_ss : GCCBuiltin<"__builtin_ia32_maxss">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_max_ps : GCCBuiltin<"__builtin_ia32_maxps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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}
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// Comparison ops
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_sse_cmpeq_ss : GCCBuiltin<"__builtin_ia32_cmpeqss">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpeq_ps : GCCBuiltin<"__builtin_ia32_cmpeqps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmplt_ss : GCCBuiltin<"__builtin_ia32_cmpltss">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmplt_ps : GCCBuiltin<"__builtin_ia32_cmpltps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmple_ss : GCCBuiltin<"__builtin_ia32_cmpless">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmple_ps : GCCBuiltin<"__builtin_ia32_cmpleps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpgt_ss : GCCBuiltin<"__builtin_ia32_cmpgtss">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpgt_ps : GCCBuiltin<"__builtin_ia32_cmpgtps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpge_ss : GCCBuiltin<"__builtin_ia32_cmpgess">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpge_ps : GCCBuiltin<"__builtin_ia32_cmpgeps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpneq_ss : GCCBuiltin<"__builtin_ia32_cmpneqss">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpneq_ps : GCCBuiltin<"__builtin_ia32_cmpneqps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpnlt_ss : GCCBuiltin<"__builtin_ia32_cmpnltss">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpnlt_ps : GCCBuiltin<"__builtin_ia32_cmpnltps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpnle_ss : GCCBuiltin<"__builtin_ia32_cmpnless">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpnle_ps : GCCBuiltin<"__builtin_ia32_cmpnleps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpngt_ss : GCCBuiltin<"__builtin_ia32_cmpngtss">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpngt_ps : GCCBuiltin<"__builtin_ia32_cmpngtps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpnge_ss : GCCBuiltin<"__builtin_ia32_cmpngess">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpnge_ps : GCCBuiltin<"__builtin_ia32_cmpngeps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpord_ss : GCCBuiltin<"__builtin_ia32_cmpordss">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpord_ps : GCCBuiltin<"__builtin_ia32_cmpordps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpunord_ss : GCCBuiltin<"__builtin_ia32_cmpunordss">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cmpunord_ps : GCCBuiltin<"__builtin_ia32_cmpunordps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_comieq_ss : GCCBuiltin<"__builtin_ia32_comieq">,
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Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_comilt_ss : GCCBuiltin<"__builtin_ia32_comilt">,
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Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_comile_ss : GCCBuiltin<"__Builtin_ia32_comile">,
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Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_comigt_ss : GCCBuiltin<"__builtin_ia32_comigt">,
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Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_comige_ss : GCCBuiltin<"__builtin_ia32_comige">,
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Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_comineq_ss : GCCBuiltin<"__builtin_ia32_comineq">,
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Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_ucomieq_ss : GCCBuiltin<"__builtin_ia32_ucomieq">,
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Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_ucomilt_ss : GCCBuiltin<"__builtin_ia32_ucomilt">,
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Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_ucomile_ss : GCCBuiltin<"__Builtin_ia32_ucomile">,
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Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_ucomigt_ss : GCCBuiltin<"__builtin_ia32_ucomigt">,
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Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_ucomige_ss : GCCBuiltin<"__builtin_ia32_ucomige">,
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Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_ucomineq_ss : GCCBuiltin<"__builtin_ia32_ucomineq">,
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Intrinsic<[llvm_int_ty, llvm_v4f32_ty,
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llvm_v4f32_ty], [InstrNoMem]>;
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}
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// Conversion ops
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_sse_cvtss2si : GCCBuiltin<"__builtin_ia32_cvtss2si">,
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Intrinsic<[llvm_int_ty, llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cvtps2pi : GCCBuiltin<"__builtin_ia32_cvtps2pi">,
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Intrinsic<[llvm_v2i32_ty, llvm_v4i32_ty], [InstrNoMem]>;
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def int_x86_sse_cvttss2si : GCCBuiltin<"__builtin_ia32_cvttss2si">,
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Intrinsic<[llvm_int_ty, llvm_v4f32_ty], [InstrNoMem]>;
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def int_x86_sse_cvttps2pi : GCCBuiltin<"__builtin_ia32_cvttps2pi">,
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Intrinsic<[llvm_v2i32_ty, llvm_v4i32_ty], [InstrNoMem]>;
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def int_x86_sse_cvtsi2ss : GCCBuiltin<"__builtin_ia32_cvtsi2ss">,
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Intrinsic<[llvm_v4f32_ty, llvm_int_ty], [InstrNoMem]>;
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def int_x86_sse_cvtpi2ps : GCCBuiltin<"__builtin_ia32_cvtpi2ps">,
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Intrinsic<[llvm_v4f32_ty, llvm_v2i32_ty], [InstrNoMem]>;
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}
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// SIMD load ops
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_sse_loadh_ps : GCCBuiltin<"__builtin_ia32_loadhps">,
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Intrinsic<[llvm_v4f32_ty, llvm_ptr_ty], [IntrReadMem]>;
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def int_x86_sse_loadl_ps : GCCBuiltin<"__builtin_ia32_loadlps">,
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Intrinsic<[llvm_v4f32_ty, llvm_ptr_ty], [IntrReadMem]>;
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def int_x86_sse_loadu_ps : GCCBuiltin<"__builtin_ia32_loadups">,
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Intrinsic<[llvm_v4f32_ty, llvm_ptr_ty], [IntrReadMem]>;
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}
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// SIMD store ops
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_sse_storeh_ps : GCCBuiltin<"__builtin_ia32_storehps">,
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Intrinsic<[llvm_ptr_ty, llvm_v4f32_ty], [IntrWriteMem]>;
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def int_x86_sse_storel_ps : GCCBuiltin<"__builtin_ia32_storelps">,
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Intrinsic<[llvm_ptr_ty, llvm_v4f32_ty], [IntrWriteMem]>;
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def int_x86_sse_storeu_ps : GCCBuiltin<"__builtin_ia32_storeups">,
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Intrinsic<[llvm_ptr_ty, llvm_v4f32_ty], [IntrWriteMem]>;
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}
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// Cacheability support ops
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_sse_prefetch : GCCBuiltin<"__builtin_ia32_prefetch">,
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Intrinsic<[llvm_ptr_ty, llvm_int_ty], [IntrWriteMem]>;
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def int_x86_sse_movntq : GCCBuiltin<"__builtin_ia32_movntq">,
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Intrinsic<[llvm_ptr_ty, llvm_v2i32_ty], [IntrWriteMem]>;
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def int_x86_sse_movntps : GCCBuiltin<"__builtin_ia32_movntps">,
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Intrinsic<[llvm_ptr_ty, llvm_v4f32_ty], [IntrWriteMem]>;
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def int_x86_sse_sfence : GCCBuiltin<"__builtin_ia32_sfence">,
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Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
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}
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// Control register.
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_sse_stmxcsr : GCCBuiltin<"__builtin_ia32_stmxcsr">,
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Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
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def int_x86_sse_ldmxcsr : GCCBuiltin<"__builtin_ia32_ldmxcsr">,
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Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
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}
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// Misc.
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_sse_movmsk_ps : GCCBuiltin<"__builtin_ia32_movmskps">,
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Intrinsic<[llvm_int_ty, llvm_v4f32_ty], [InstrNoMem]>;
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}
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//===----------------------------------------------------------------------===//
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// SSE2
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// Arithmetic ops
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_sse2_add_sd : GCCBuiltin<"__builtin_ia32_addsd">,
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Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
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llvm_v2f64_ty], [InstrNoMem]>;
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def int_x86_sse2_sub_sd : GCCBuiltin<"__builtin_ia32_subsd">,
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Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
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llvm_v2f64_ty], [InstrNoMem]>;
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def int_x86_sse2_mul_sd : GCCBuiltin<"__builtin_ia32_mulsd">,
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Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
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llvm_v2f64_ty], [InstrNoMem]>;
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def int_x86_sse2_div_sd : GCCBuiltin<"__builtin_ia32_divsd">,
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Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
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llvm_v2f64_ty], [InstrNoMem]>;
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def int_x86_sse2_sqrt_sd : GCCBuiltin<"__builtin_ia32_sqrtsd">,
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Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
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[InstrNoMem]>;
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def int_x86_sse2_sqrt_pd : GCCBuiltin<"__builtin_ia32_sqrtpd">,
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Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
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[InstrNoMem]>;
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def int_x86_sse2_rcp_sd : GCCBuiltin<"__builtin_ia32_rcpsd">,
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Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
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[InstrNoMem]>;
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def int_x86_sse2_rcp_pd : GCCBuiltin<"__builtin_ia32_rcppd">,
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Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
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[InstrNoMem]>;
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def int_x86_sse2_rsqrt_sd : GCCBuiltin<"__builtin_ia32_rsqrtsd">,
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Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
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[InstrNoMem]>;
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def int_x86_sse2_rsqrt_pd : GCCBuiltin<"__builtin_ia32_rsqrtpd">,
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Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
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[InstrNoMem]>;
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def int_x86_sse2_min_sd : GCCBuiltin<"__builtin_ia32_minsd">,
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Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
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llvm_v2f64_ty], [InstrNoMem]>;
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def int_x86_sse2_min_pd : GCCBuiltin<"__builtin_ia32_minpd">,
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Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
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llvm_v2f64_ty], [InstrNoMem]>;
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def int_x86_sse2_max_sd : GCCBuiltin<"__builtin_ia32_maxsd">,
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Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
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llvm_v2f64_ty], [InstrNoMem]>;
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def int_x86_sse2_max_pd : GCCBuiltin<"__builtin_ia32_maxpd">,
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Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
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llvm_v2f64_ty], [InstrNoMem]>;
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}
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// Misc.
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_sse2_packsswb_128 : GCCBuiltin<"__builtin_ia32_packsswb128">,
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Intrinsic<[llvm_v16i8_ty, llvm_v8i16_ty,
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llvm_v8i16_ty], [InstrNoMem]>;
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def int_x86_sse2_packssdw_128 : GCCBuiltin<"__builtin_ia32_packssdw128">,
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Intrinsic<[llvm_v8i16_ty, llvm_v4i32_ty,
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llvm_v4i32_ty], [InstrNoMem]>;
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def int_x86_sse2_packuswb_128 : GCCBuiltin<"__builtin_ia32_packuswb128">,
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Intrinsic<[llvm_v16i8_ty, llvm_v8i16_ty,
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llvm_v8i16_ty], [InstrNoMem]>;
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def int_x86_sse2_movmskpd : GCCBuiltin<"__builtin_ia32_movmskpd">,
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Intrinsic<[llvm_int_ty, llvm_v2f64_ty], [InstrNoMem]>;
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}
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