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https://github.com/c64scene-ar/llvm-6502.git
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216351 91177308-0d34-0410-b5e6-96231b3b80d8
209 lines
6.9 KiB
C++
209 lines
6.9 KiB
C++
//===-- UnreachableBlockElim.cpp - Remove unreachable blocks for codegen --===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This pass is an extremely simple version of the SimplifyCFG pass. Its sole
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// job is to delete LLVM basic blocks that are not reachable from the entry
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// node. To do this, it performs a simple depth first traversal of the CFG,
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// then deletes any unvisited nodes.
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//
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// Note that this pass is really a hack. In particular, the instruction
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// selectors for various targets should just not generate code for unreachable
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// blocks. Until LLVM has a more systematic way of defining instruction
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// selectors, however, we cannot really expect them to handle additional
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// complexity.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/ADT/DepthFirstIterator.h"
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#include "llvm/ADT/SmallPtrSet.h"
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#include "llvm/CodeGen/MachineDominators.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineLoopInfo.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/IR/CFG.h"
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#include "llvm/IR/Constant.h"
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#include "llvm/IR/Dominators.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/Instructions.h"
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#include "llvm/IR/Type.h"
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#include "llvm/Pass.h"
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#include "llvm/Target/TargetInstrInfo.h"
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using namespace llvm;
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namespace {
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class UnreachableBlockElim : public FunctionPass {
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bool runOnFunction(Function &F) override;
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public:
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static char ID; // Pass identification, replacement for typeid
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UnreachableBlockElim() : FunctionPass(ID) {
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initializeUnreachableBlockElimPass(*PassRegistry::getPassRegistry());
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}
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.addPreserved<DominatorTreeWrapperPass>();
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}
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};
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}
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char UnreachableBlockElim::ID = 0;
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INITIALIZE_PASS(UnreachableBlockElim, "unreachableblockelim",
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"Remove unreachable blocks from the CFG", false, false)
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FunctionPass *llvm::createUnreachableBlockEliminationPass() {
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return new UnreachableBlockElim();
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}
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bool UnreachableBlockElim::runOnFunction(Function &F) {
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SmallPtrSet<BasicBlock*, 8> Reachable;
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// Mark all reachable blocks.
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for (BasicBlock *BB : depth_first_ext(&F, Reachable))
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(void)BB/* Mark all reachable blocks */;
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// Loop over all dead blocks, remembering them and deleting all instructions
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// in them.
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std::vector<BasicBlock*> DeadBlocks;
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for (Function::iterator I = F.begin(), E = F.end(); I != E; ++I)
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if (!Reachable.count(I)) {
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BasicBlock *BB = I;
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DeadBlocks.push_back(BB);
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while (PHINode *PN = dyn_cast<PHINode>(BB->begin())) {
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PN->replaceAllUsesWith(Constant::getNullValue(PN->getType()));
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BB->getInstList().pop_front();
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}
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for (succ_iterator SI = succ_begin(BB), E = succ_end(BB); SI != E; ++SI)
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(*SI)->removePredecessor(BB);
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BB->dropAllReferences();
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}
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// Actually remove the blocks now.
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for (unsigned i = 0, e = DeadBlocks.size(); i != e; ++i) {
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DeadBlocks[i]->eraseFromParent();
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}
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return DeadBlocks.size();
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}
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namespace {
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class UnreachableMachineBlockElim : public MachineFunctionPass {
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bool runOnMachineFunction(MachineFunction &F) override;
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void getAnalysisUsage(AnalysisUsage &AU) const override;
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MachineModuleInfo *MMI;
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public:
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static char ID; // Pass identification, replacement for typeid
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UnreachableMachineBlockElim() : MachineFunctionPass(ID) {}
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};
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}
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char UnreachableMachineBlockElim::ID = 0;
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INITIALIZE_PASS(UnreachableMachineBlockElim, "unreachable-mbb-elimination",
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"Remove unreachable machine basic blocks", false, false)
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char &llvm::UnreachableMachineBlockElimID = UnreachableMachineBlockElim::ID;
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void UnreachableMachineBlockElim::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addPreserved<MachineLoopInfo>();
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AU.addPreserved<MachineDominatorTree>();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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bool UnreachableMachineBlockElim::runOnMachineFunction(MachineFunction &F) {
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SmallPtrSet<MachineBasicBlock*, 8> Reachable;
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bool ModifiedPHI = false;
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MMI = getAnalysisIfAvailable<MachineModuleInfo>();
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MachineDominatorTree *MDT = getAnalysisIfAvailable<MachineDominatorTree>();
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MachineLoopInfo *MLI = getAnalysisIfAvailable<MachineLoopInfo>();
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// Mark all reachable blocks.
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for (MachineBasicBlock *BB : depth_first_ext(&F, Reachable))
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(void)BB/* Mark all reachable blocks */;
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// Loop over all dead blocks, remembering them and deleting all instructions
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// in them.
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std::vector<MachineBasicBlock*> DeadBlocks;
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for (MachineFunction::iterator I = F.begin(), E = F.end(); I != E; ++I) {
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MachineBasicBlock *BB = I;
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// Test for deadness.
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if (!Reachable.count(BB)) {
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DeadBlocks.push_back(BB);
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// Update dominator and loop info.
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if (MLI) MLI->removeBlock(BB);
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if (MDT && MDT->getNode(BB)) MDT->eraseNode(BB);
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while (BB->succ_begin() != BB->succ_end()) {
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MachineBasicBlock* succ = *BB->succ_begin();
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MachineBasicBlock::iterator start = succ->begin();
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while (start != succ->end() && start->isPHI()) {
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for (unsigned i = start->getNumOperands() - 1; i >= 2; i-=2)
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if (start->getOperand(i).isMBB() &&
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start->getOperand(i).getMBB() == BB) {
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start->RemoveOperand(i);
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start->RemoveOperand(i-1);
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}
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start++;
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}
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BB->removeSuccessor(BB->succ_begin());
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}
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}
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}
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// Actually remove the blocks now.
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for (unsigned i = 0, e = DeadBlocks.size(); i != e; ++i)
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DeadBlocks[i]->eraseFromParent();
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// Cleanup PHI nodes.
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for (MachineFunction::iterator I = F.begin(), E = F.end(); I != E; ++I) {
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MachineBasicBlock *BB = I;
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// Prune unneeded PHI entries.
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SmallPtrSet<MachineBasicBlock*, 8> preds(BB->pred_begin(),
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BB->pred_end());
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MachineBasicBlock::iterator phi = BB->begin();
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while (phi != BB->end() && phi->isPHI()) {
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for (unsigned i = phi->getNumOperands() - 1; i >= 2; i-=2)
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if (!preds.count(phi->getOperand(i).getMBB())) {
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phi->RemoveOperand(i);
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phi->RemoveOperand(i-1);
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ModifiedPHI = true;
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}
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if (phi->getNumOperands() == 3) {
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unsigned Input = phi->getOperand(1).getReg();
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unsigned Output = phi->getOperand(0).getReg();
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MachineInstr* temp = phi;
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++phi;
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temp->eraseFromParent();
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ModifiedPHI = true;
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if (Input != Output) {
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MachineRegisterInfo &MRI = F.getRegInfo();
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MRI.constrainRegClass(Input, MRI.getRegClass(Output));
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MRI.replaceRegWith(Output, Input);
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}
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continue;
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}
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++phi;
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}
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}
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F.RenumberBlocks();
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return (DeadBlocks.size() || ModifiedPHI);
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}
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