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33ff5aeaa8
Generate code for Mips32r1 unless a Mips32r2 feature is tested. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139433 91177308-0d34-0410-b5e6-96231b3b80d8
24 lines
556 B
LLVM
24 lines
556 B
LLVM
; RUN: llc -march=mipsel < %s | FileCheck %s
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@g1 = external global i32
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define i32 @f1(i32 %x) nounwind {
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entry:
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; CHECK: addiu $[[T0:[0-9]+]], $sp
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; CHECK: #APP
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; CHECK: sw $4, 0($[[T0]])
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; CHECK: #NO_APP
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; CHECK: lw $[[T1:[0-9]+]], %got(g1)($gp)
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; CHECK: #APP
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; CHECK: lw $[[T3:[0-9]+]], 0($[[T0]])
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; CHECK: #NO_APP
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; CHECK: sw $[[T3]], 0($[[T1]])
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%l1 = alloca i32, align 4
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call void asm "sw $1, $0", "=*m,r"(i32* %l1, i32 %x) nounwind
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%0 = call i32 asm "lw $0, $1", "=r,*m"(i32* %l1) nounwind
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store i32 %0, i32* @g1, align 4
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ret i32 %0
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}
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