Hal Finkel 4e98296890 [PowerPC] Fold [sz]ext with fp_to_int lowering where possible ... On modern cores with lfiw[az]x, we can fold a sign or zero extension from i32 to i64 into the load necessary for an i64 -> fp conversion. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225493 91177308-0d34-0410-b5e6-96231b3b80d8		2015-01-09 01:34:30 +00:00
..
AArch64	Revert r225165 and r225169	2015-01-07 06:34:34 +00:00
ARM	Fix large stack alignment codegen for ARM and Thumb2 targets	2015-01-08 15:09:14 +00:00
CPP	IR: add "cmpxchg weak" variant to support permitted failure.	2014-06-13 14:24:07 +00:00
Generic
Hexagon	[Hexagon] Adding dealloc_return encoding and absolute address stores.	2015-01-06 16:15:15 +00:00
Inputs
Mips
MSP430
NVPTX
PowerPC	[PowerPC] Fold [sz]ext with fp_to_int lowering where possible	2015-01-09 01:34:30 +00:00
R600	R600/SI: Remove SIISelLowering::legalizeOperands()	2015-01-08 15:08:17 +00:00
SPARC
SystemZ
Thumb
Thumb2	[ARM] Fix a bug in constant island pass that was triggering an assertion.	2015-01-08 20:44:50 +00:00
X86	Masked Load/Store - fixed a bug in type legalization.	2015-01-08 12:29:19 +00:00
XCore