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This feature is needed in order to support shifts of more than 255 bits on large integer types. This changes the syntax for llvm assembly to make shl, ashr and lshr instructions look like a binary operator: shl i32 %X, 1 instead of shl i32 %X, i8 1 Additionally, this should help a few passes perform additional optimizations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33776 91177308-0d34-0410-b5e6-96231b3b80d8
37 lines
907 B
LLVM
37 lines
907 B
LLVM
; RUN: llvm-as < %s | llc -march=arm &&
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; RUN: llvm-as < %s | llc -march=arm | grep and | wc -l | grep 1 &&
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; RUN: llvm-as < %s | llc -march=arm | grep orr | wc -l | grep 1 &&
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; RUN: llvm-as < %s | llc -march=arm | grep eor | wc -l | grep 1 &&
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; RUN: llvm-as < %s | llc -march=arm | grep mov.*lsl | wc -l | grep 1 &&
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; RUN: llvm-as < %s | llc -march=arm | grep mov.*asr | wc -l | grep 1
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define i32 @f1(i32 %a, i32 %b) {
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entry:
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%tmp2 = and i32 %b, %a ; <i32> [#uses=1]
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ret i32 %tmp2
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}
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define i32 @f2(i32 %a, i32 %b) {
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entry:
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%tmp2 = or i32 %b, %a ; <i32> [#uses=1]
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ret i32 %tmp2
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}
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define i32 @f3(i32 %a, i32 %b) {
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entry:
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%tmp2 = xor i32 %b, %a ; <i32> [#uses=1]
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ret i32 %tmp2
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}
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define i32 @f4(i32 %a, i32 %b) {
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entry:
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%tmp3 = shl i32 %a, %b ; <i32> [#uses=1]
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ret i32 %tmp3
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}
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define i32 @f5(i32 %a, i32 %b) {
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entry:
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%tmp3 = ashr i32 %a, %b ; <i32> [#uses=1]
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ret i32 %tmp3
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}
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