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e3e5fcab94
This is a 1-line patch (with a TODO for AVX because that will affect even more regression tests) that lets us substitute the appropriate 64-bit store for the float/double/int domains. It's not clear to me exactly what the difference is between the 0xD6 (MOVPQI2QImr) and 0x7E (MOVSDto64mr) opcodes, but this is apparently the right choice. Differential Revision: http://reviews.llvm.org/D8691 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235014 91177308-0d34-0410-b5e6-96231b3b80d8
13 lines
329 B
LLVM
13 lines
329 B
LLVM
; RUN: llc < %s -march=x86 -mattr=+sse4.2 | FileCheck %s
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; CHECK: movl
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; CHECK: movq
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; bitcast a i64 to v2i32
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define void @convert(<2 x i32>* %dst.addr, i64 %src) nounwind {
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entry:
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%conv = bitcast i64 %src to <2 x i32>
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%xor = xor <2 x i32> %conv, < i32 255, i32 32767 >
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store <2 x i32> %xor, <2 x i32>* %dst.addr
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ret void
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}
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