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4ed2667c13
In a previous commit (r199818) we added a const_cast to an existing subtarget info instead of creating a new one so that we could reuse it when creating the TargetAsmParser for parsing inline assembly. This cast was necessary because we needed to reuse the existing STI to avoid generating incorrect code when the inline asm contained mode-switching directives (e.g. .code 16). The root cause of the failure was that there was an implicit sharing of the STI between the parser and the MCCodeEmitter. To fix a different but related issue, we now explicitly pass the STI to the MCCodeEmitter (see commits r200345-r200351). The const_cast is no longer necessary and we can now create a fresh STI for the inline asm parser to use. Differential Revision: http://llvm-reviews.chandlerc.com/D2709 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200929 91177308-0d34-0410-b5e6-96231b3b80d8
130 lines
4.4 KiB
C++
130 lines
4.4 KiB
C++
//===-- ARMAsmPrinter.h - ARM implementation of AsmPrinter ------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#ifndef ARMASMPRINTER_H
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#define ARMASMPRINTER_H
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#include "ARM.h"
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#include "ARMTargetMachine.h"
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#include "llvm/CodeGen/AsmPrinter.h"
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#include "llvm/Support/Compiler.h"
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namespace llvm {
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class MCOperand;
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namespace ARM {
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enum DW_ISA {
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DW_ISA_ARM_thumb = 1,
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DW_ISA_ARM_arm = 2
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};
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}
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class LLVM_LIBRARY_VISIBILITY ARMAsmPrinter : public AsmPrinter {
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/// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
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/// make the right decision when printing asm code for different targets.
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const ARMSubtarget *Subtarget;
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/// AFI - Keep a pointer to ARMFunctionInfo for the current
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/// MachineFunction.
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ARMFunctionInfo *AFI;
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/// MCP - Keep a pointer to constantpool entries of the current
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/// MachineFunction.
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const MachineConstantPool *MCP;
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/// InConstantPool - Maintain state when emitting a sequence of constant
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/// pool entries so we can properly mark them as data regions.
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bool InConstantPool;
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public:
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explicit ARMAsmPrinter(TargetMachine &TM, MCStreamer &Streamer)
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: AsmPrinter(TM, Streamer), AFI(NULL), MCP(NULL), InConstantPool(false) {
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Subtarget = &TM.getSubtarget<ARMSubtarget>();
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}
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virtual const char *getPassName() const LLVM_OVERRIDE {
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return "ARM Assembly / Object Emitter";
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}
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void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O,
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const char *Modifier = 0);
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virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
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unsigned AsmVariant, const char *ExtraCode,
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raw_ostream &O) LLVM_OVERRIDE;
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virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
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unsigned AsmVariant, const char *ExtraCode,
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raw_ostream &O) LLVM_OVERRIDE;
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virtual void emitInlineAsmEnd(const MCSubtargetInfo &StartInfo,
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const MCSubtargetInfo *EndInfo) const
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LLVM_OVERRIDE;
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void EmitJumpTable(const MachineInstr *MI);
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void EmitJump2Table(const MachineInstr *MI);
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virtual void EmitInstruction(const MachineInstr *MI) LLVM_OVERRIDE;
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virtual bool runOnMachineFunction(MachineFunction &F) LLVM_OVERRIDE;
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virtual void EmitConstantPool() LLVM_OVERRIDE {
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// we emit constant pools customly!
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}
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virtual void EmitFunctionBodyEnd() LLVM_OVERRIDE;
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virtual void EmitFunctionEntryLabel() LLVM_OVERRIDE;
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virtual void EmitStartOfAsmFile(Module &M) LLVM_OVERRIDE;
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virtual void EmitEndOfAsmFile(Module &M) LLVM_OVERRIDE;
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virtual void EmitXXStructor(const Constant *CV) LLVM_OVERRIDE;
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// lowerOperand - Convert a MachineOperand into the equivalent MCOperand.
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bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp);
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private:
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// Helpers for EmitStartOfAsmFile() and EmitEndOfAsmFile()
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void emitAttributes();
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// Generic helper used to emit e.g. ARMv5 mul pseudos
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void EmitPatchedInstruction(const MachineInstr *MI, unsigned TargetOpc);
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void EmitUnwindingInstruction(const MachineInstr *MI);
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// emitPseudoExpansionLowering - tblgen'erated.
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bool emitPseudoExpansionLowering(MCStreamer &OutStreamer,
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const MachineInstr *MI);
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public:
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/// EmitDwarfRegOp - Emit dwarf register operation.
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virtual void EmitDwarfRegOp(const MachineLocation &MLoc, bool Indirect) const
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LLVM_OVERRIDE;
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virtual unsigned getISAEncoding() LLVM_OVERRIDE {
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// ARM/Darwin adds ISA to the DWARF info for each function.
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if (!Subtarget->isTargetMachO())
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return 0;
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return Subtarget->isThumb() ?
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ARM::DW_ISA_ARM_thumb : ARM::DW_ISA_ARM_arm;
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}
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private:
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MCOperand GetSymbolRef(const MachineOperand &MO, const MCSymbol *Symbol);
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MCSymbol *GetARMJTIPICJumpTableLabel2(unsigned uid, unsigned uid2) const;
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MCSymbol *GetARMSJLJEHLabel() const;
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MCSymbol *GetARMGVSymbol(const GlobalValue *GV, unsigned char TargetFlags);
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public:
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/// EmitMachineConstantPoolValue - Print a machine constantpool value to
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/// the .s file.
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virtual void
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EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) LLVM_OVERRIDE;
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};
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} // end namespace llvm
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#endif
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