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0ec587e26c
SDNodes and MachineOperands get target flags representing the %hi() and %lo() assembly annotations that eventually become relocations. Also define flags to be used by the 64-bit code models. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179468 91177308-0d34-0410-b5e6-96231b3b80d8
63 lines
1.6 KiB
C++
63 lines
1.6 KiB
C++
//===-- SparcBaseInfo.h - Top level definitions for Sparc ---- --*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains small standalone helper functions and enum definitions
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// for the Sparc target useful for the compiler back-end and the MC libraries.
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// As such, it deliberately does not include references to LLVM core code gen
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// types, passes, etc..
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//
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//===----------------------------------------------------------------------===//
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#ifndef SPARCBASEINFO_H
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#define SPARCBASEINFO_H
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namespace llvm {
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/// SPII - This namespace holds target specific flags for instruction info.
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namespace SPII {
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/// Target Operand Flags. Sparc specific TargetFlags for MachineOperands and
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/// SDNodes.
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enum TOF {
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MO_NO_FLAG,
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// Extract the low 10 bits of an address.
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// Assembler: %lo(addr)
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MO_LO,
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// Extract bits 31-10 of an address. Only for sethi.
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// Assembler: %hi(addr) or %lm(addr)
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MO_HI,
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// Extract bits 43-22 of an adress. Only for sethi.
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// Assembler: %h44(addr)
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MO_H44,
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// Extract bits 21-12 of an address.
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// Assembler: %m44(addr)
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MO_M44,
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// Extract bits 11-0 of an address.
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// Assembler: %l44(addr)
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MO_L44,
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// Extract bits 63-42 of an address. Only for sethi.
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// Assembler: %hh(addr)
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MO_HH,
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// Extract bits 41-32 of an address.
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// Assembler: %hm(addr)
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MO_HM
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};
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} // end namespace SPII
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} // end namespace llvm
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#endif
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