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https://github.com/c64scene-ar/llvm-6502.git
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11ae250ec9
We now consider the FPOpFusion flag when determining whether to fuse ops. We also explicitly emit add.rn when fusion is disabled to prevent ptxas from fusing the operations on its own. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213287 91177308-0d34-0410-b5e6-96231b3b80d8
34 lines
1.1 KiB
LLVM
34 lines
1.1 KiB
LLVM
; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 -fp-contract=fast | FileCheck %s --check-prefix=FAST
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; RUN: llc < %s -march=nvptx64 -mcpu=sm_30 | FileCheck %s --check-prefix=DEFAULT
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target triple = "nvptx64-unknown-cuda"
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;; Make sure we are generating proper instruction sequences for fused ops
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;; If fusion is allowed, we try to form fma.rn at the PTX level, and emit
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;; add.f32 otherwise. Without an explicit rounding mode on add.f32, ptxas
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;; is free to fuse with a multiply if it is able. If fusion is not allowed,
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;; we do not form fma.rn at the PTX level and explicitly generate add.rn
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;; for all adds to prevent ptxas from fusion the ops.
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;; FAST-LABEL: @t0
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;; DEFAULT-LABEL: @t0
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define float @t0(float %a, float %b, float %c) {
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;; FAST: fma.rn.f32
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;; DEFAULT: mul.rn.f32
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;; DEFAULT: add.rn.f32
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%v0 = fmul float %a, %b
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%v1 = fadd float %v0, %c
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ret float %v1
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}
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;; FAST-LABEL: @t1
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;; DEFAULT-LABEL: @t1
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define float @t1(float %a, float %b) {
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;; We cannot form an fma here, but make sure we explicitly emit add.rn.f32
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;; to prevent ptxas from fusing this with anything else.
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;; FAST: add.f32
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;; DEFAULT: add.rn.f32
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%v1 = fadd float %a, %b
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ret float %v1
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}
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