mirror of
https://github.com/c64scene-ar/llvm-6502.git
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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
69 lines
2.2 KiB
LLVM
69 lines
2.2 KiB
LLVM
; RUN: llc -code-model=small < %s | FileCheck %s
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target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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@double_array = global [32 x double] zeroinitializer, align 8
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@number64 = global i64 10, align 8
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@internal_static_var.x = internal unnamed_addr global i64 0, align 8
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define i64 @access_int64(i64 %a) nounwind readonly {
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entry:
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; CHECK-LABEL: access_int64:
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; CHECK-NEXT: .align 3
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; CHECK-NEXT: .quad .L.access_int64
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; CHECK-NEXT: .quad .TOC.@tocbase
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; CHECK-NEXT: .quad 0
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; CHECK-NEXT: .text
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%0 = load i64, i64* @number64, align 8
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; CHECK: ld {{[0-9]+}}, .LC{{[0-9]+}}@toc(2)
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%cmp = icmp eq i64 %0, %a
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%conv1 = zext i1 %cmp to i64
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ret i64 %conv1
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}
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define i64 @internal_static_var(i64 %a) nounwind {
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entry:
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; CHECK-LABEL: internal_static_var:
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; CHECK: ld {{[0-9]+}}, .LC{{[0-9]+}}@toc(2)
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%0 = load i64, i64* @internal_static_var.x, align 8
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%cmp = icmp eq i64 %0, %a
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%conv1 = zext i1 %cmp to i64
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ret i64 %conv1
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}
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define i32 @access_double(double %a) nounwind readnone {
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entry:
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; CHECK-LABEL: access_double:
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; CHECK: ld {{[0-9]+}}, .LC{{[0-9]+}}@toc(2)
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%cmp = fcmp oeq double %a, 2.000000e+00
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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}
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define i32 @access_double_array(double %a, i32 %i) nounwind readonly {
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entry:
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; CHECK-LABEL: access_double_array:
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%idxprom = sext i32 %i to i64
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%arrayidx = getelementptr inbounds [32 x double], [32 x double]* @double_array, i64 0, i64 %idxprom
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%0 = load double, double* %arrayidx, align 8
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; CHECK: ld {{[0-9]+}}, .LC{{[0-9]+}}@toc(2)
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%cmp = fcmp oeq double %0, %a
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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}
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; Check the creation of 4 .tc entries:
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; * int64_t global 'number64'
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; * double constant 2.0
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; * double array 'double_array'
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; * static int64_t 'x' accessed within '@internal_static_var'
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; CHECK: .LC{{[0-9]+}}:
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; CHECK-NEXT: .tc {{[\._a-zA-Z0-9]+}}[TC],{{[\._a-zA-Z0-9]+}}
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; CHECK-NEXT: .LC{{[0-9]+}}:
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; CHECK-NEXT: .tc {{[\._a-zA-Z0-9]+}}[TC],{{[\._a-zA-Z0-9]+}}
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; CHECK-NEXT: .LC{{[0-9]+}}:
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; CHECK-NEXT: .tc {{[\._a-zA-Z0-9]+}}[TC],{{[\._a-zA-Z0-9]+}}
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; CHECK-NEXT: .LC{{[0-9]+}}:
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; CHECK-NEXT: .tc {{[\._a-zA-Z0-9]+}}[TC],{{[\._a-zA-Z0-9]+}}
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