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https://github.com/c64scene-ar/llvm-6502.git
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49b3971b70
See full discussion in http://reviews.llvm.org/D7491. We now hide the add-immediate and call instructions together in a separate pseudo-op, which is tagged to define GPR3 and clobber the call-killed registers. The PPCTLSDynamicCall pass prior to RA now expands this op into the two separate addi and call ops, with explicit definitions of GPR3 on both instructions, and explicit clobbers on the call instruction. The pass is now marked as requiring and preserving the LiveIntervals and SlotIndexes analyses, and fixes these up after the replacement sequences are introduced. Self-hosting has been verified on LE P8 and BE P7 with various optimization levels, etc. It has also been verified with the --no-tls-optimize flag workaround removed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228725 91177308-0d34-0410-b5e6-96231b3b80d8
25 lines
519 B
LLVM
25 lines
519 B
LLVM
; RUN: llc -mcpu=pwr7 < %s | FileCheck %s
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target datalayout = "E-m:e-i64:64-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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; Function Attrs: nounwind readnone
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define i8* @test1() #0 {
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entry:
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%0 = tail call i8* @llvm.returnaddress(i32 0)
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ret i8* %0
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}
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; CHECK-LABEL: @test1
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; CHECK: mflr 0
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; CHECK: std 0, 16(1)
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; CHECK-DAG: ld 3, 64(1)
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; CHECK-DAG: ld 0, 16(1)
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; CHECK: mtlr 0
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; CHECK: blr
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; Function Attrs: nounwind readnone
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declare i8* @llvm.returnaddress(i32) #0
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attributes #0 = { nounwind readnone }
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