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https://github.com/c64scene-ar/llvm-6502.git
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One of several parallel first steps to remove the target type of pointers, replacing them with a single opaque pointer type. This adds an explicit type parameter to the gep instruction so that when the first parameter becomes an opaque pointer type, the type to gep through is still available to the instructions. * This doesn't modify gep operators, only instructions (operators will be handled separately) * Textual IR changes only. Bitcode (including upgrade) and changing the in-memory representation will be in separate changes. * geps of vectors are transformed as: getelementptr <4 x float*> %x, ... ->getelementptr float, <4 x float*> %x, ... Then, once the opaque pointer type is introduced, this will ultimately look like: getelementptr float, <4 x ptr> %x with the unambiguous interpretation that it is a vector of pointers to float. * address spaces remain on the pointer, not the type: getelementptr float addrspace(1)* %x ->getelementptr float, float addrspace(1)* %x Then, eventually: getelementptr float, ptr addrspace(1) %x Importantly, the massive amount of test case churn has been automated by same crappy python code. I had to manually update a few test cases that wouldn't fit the script's model (r228970,r229196,r229197,r229198). The python script just massages stdin and writes the result to stdout, I then wrapped that in a shell script to handle replacing files, then using the usual find+xargs to migrate all the files. update.py: import fileinput import sys import re ibrep = re.compile(r"(^.*?[^%\w]getelementptr inbounds )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))") normrep = re.compile( r"(^.*?[^%\w]getelementptr )(((?:<\d* x )?)(.*?)(| addrspace\(\d\)) *\*(|>)(?:$| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$))") def conv(match, line): if not match: return line line = match.groups()[0] if len(match.groups()[5]) == 0: line += match.groups()[2] line += match.groups()[3] line += ", " line += match.groups()[1] line += "\n" return line for line in sys.stdin: if line.find("getelementptr ") == line.find("getelementptr inbounds"): if line.find("getelementptr inbounds") != line.find("getelementptr inbounds ("): line = conv(re.match(ibrep, line), line) elif line.find("getelementptr ") != line.find("getelementptr ("): line = conv(re.match(normrep, line), line) sys.stdout.write(line) apply.sh: for name in "$@" do python3 `dirname "$0"`/update.py < "$name" > "$name.tmp" && mv "$name.tmp" "$name" rm -f "$name.tmp" done The actual commands: From llvm/src: find test/ -name *.ll | xargs ./apply.sh From llvm/src/tools/clang: find test/ -name *.mm -o -name *.m -o -name *.cpp -o -name *.c | xargs -I '{}' ../../apply.sh "{}" From llvm/src/tools/polly: find test/ -name *.ll | xargs ./apply.sh After that, check-all (with llvm, clang, clang-tools-extra, lld, compiler-rt, and polly all checked out). The extra 'rm' in the apply.sh script is due to a few files in clang's test suite using interesting unicode stuff that my python script was throwing exceptions on. None of those files needed to be migrated, so it seemed sufficient to ignore those cases. Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7636 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230786 91177308-0d34-0410-b5e6-96231b3b80d8
264 lines
7.6 KiB
LLVM
264 lines
7.6 KiB
LLVM
; RUN: llc < %s -march=xcore | FileCheck %s
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; RUN: llc < %s -march=xcore -disable-fp-elim | FileCheck %s -check-prefix=CHECKFP
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; When using SP for small frames, we don't need any scratch registers (SR).
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; When using SP for large frames, we may need two scratch registers.
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; When using FP, for large or small frames, we may need one scratch register.
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; FP + small frame: spill FP+SR = entsp 2
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; CHECKFP-LABEL: f1
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; CHECKFP: entsp 2
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; CHECKFP-NEXT: stw r10, sp[1]
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; CHECKFP-NEXT: ldaw r10, sp[0]
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; CHECKFP: set sp, r10
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; CHECKFP-NEXT: ldw r10, sp[1]
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; CHECKFP-NEXT: retsp 2
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;
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; !FP + small frame: no spills = no stack adjustment needed
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; CHECK-LABEL: f1
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; CHECK: stw lr, sp[0]
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; CHECK: ldw lr, sp[0]
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; CHECK-NEXT: retsp 0
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define void @f1() nounwind {
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entry:
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tail call void asm sideeffect "", "~{lr}"() nounwind
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ret void
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}
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; FP + small frame: spill FP+SR+R0+LR = entsp 3 + extsp 1
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; CHECKFP-LABEL:f3
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; CHECKFP: entsp 3
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; CHECKFP-NEXT: stw r10, sp[1]
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; CHECKFP-NEXT: ldaw r10, sp[0]
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; CHECKFP-NEXT: stw [[REG:r[4-9]+]], r10[2]
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; CHECKFP-NEXT: mov [[REG]], r0
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; CHECKFP-NEXT: extsp 1
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; CHECKFP-NEXT: bl f2
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; CHECKFP-NEXT: ldaw sp, sp[1]
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; CHECKFP-NEXT: mov r0, [[REG]]
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; CHECKFP-NEXT: ldw [[REG]], r10[2]
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; CHECKFP-NEXT: set sp, r10
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; CHECKFP-NEXT: ldw r10, sp[1]
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; CHECKFP-NEXT: retsp 3
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;
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; !FP + small frame: spill R0+LR = entsp 2
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; CHECK-LABEL: f3
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; CHECK: entsp 2
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; CHECK-NEXT: stw [[REG:r[4-9]+]], sp[1]
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; CHECK-NEXT: mov [[REG]], r0
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; CHECK-NEXT: bl f2
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; CHECK-NEXT: mov r0, [[REG]]
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; CHECK-NEXT: ldw [[REG]], sp[1]
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; CHECK-NEXT: retsp 2
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declare void @f2()
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define i32 @f3(i32 %i) nounwind {
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entry:
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call void @f2()
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ret i32 %i
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}
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; FP + large frame: spill FP+SR = entsp 2 + 100000
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; CHECKFP-LABEL: f4
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; CHECKFP: entsp 65535
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; CHECKFP-NEXT: .Ltmp{{[0-9]+}}
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; CHECKFP-NEXT: .cfi_def_cfa_offset 262140
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; CHECKFP-NEXT: .Ltmp{{[0-9]+}}
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; CHECKFP-NEXT: .cfi_offset 15, 0
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; CHECKFP-NEXT: extsp 34467
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; CHECKFP-NEXT: .Ltmp{{[0-9]+}}
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; CHECKFP-NEXT: .cfi_def_cfa_offset 400008
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; CHECKFP-NEXT: stw r10, sp[1]
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; CHECKFP-NEXT: .Ltmp{{[0-9]+}}
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; CHECKFP-NEXT: .cfi_offset 10, -400004
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; CHECKFP-NEXT: ldaw r10, sp[0]
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; CHECKFP-NEXT: .Ltmp{{[0-9]+}}
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; CHECKFP-NEXT: .cfi_def_cfa_register 10
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; CHECKFP-NEXT: set sp, r10
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; CHECKFP-NEXT: ldw r10, sp[1]
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; CHECKFP-NEXT: ldaw sp, sp[65535]
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; CHECKFP-NEXT: retsp 34467
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;
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; !FP + large frame: spill SR+SR = entsp 2 + 100000
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; CHECK-LABEL: f4
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; CHECK: entsp 65535
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; CHECK-NEXT: .Ltmp{{[0-9]+}}
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; CHECK-NEXT: .cfi_def_cfa_offset 262140
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; CHECK-NEXT: .Ltmp{{[0-9]+}}
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; CHECK-NEXT: .cfi_offset 15, 0
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; CHECK-NEXT: extsp 34467
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; CHECK-NEXT: .Ltmp{{[0-9]+}}
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; CHECK-NEXT: .cfi_def_cfa_offset 400008
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; CHECK-NEXT: ldaw sp, sp[65535]
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; CHECK-NEXT: retsp 34467
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define void @f4() {
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entry:
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%0 = alloca [100000 x i32]
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ret void
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}
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; FP + large frame: spill FP+SR+R4+LR = entsp 3 + 200000 + extsp 1
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; CHECKFP: .section .cp.rodata.cst4,"aMc",@progbits,4
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; CHECKFP-NEXT: .align 4
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; CHECKFP-NEXT: .LCPI[[CNST0:[0-9_]+]]:
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; CHECKFP-NEXT: .long 200002
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; CHECKFP-NEXT: .LCPI[[CNST1:[0-9_]+]]:
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; CHECKFP-NEXT: .long 200001
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; CHECKFP-NEXT: .text
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; CHECKFP-LABEL: f6
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; CHECKFP: entsp 65535
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; CHECKFP-NEXT: .Ltmp{{[0-9]+}}
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; CHECKFP-NEXT: .cfi_def_cfa_offset 262140
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; CHECKFP-NEXT: .Ltmp{{[0-9]+}}
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; CHECKFP-NEXT: .cfi_offset 15, 0
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; CHECKFP-NEXT: extsp 65535
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; CHECKFP-NEXT: .Ltmp{{[0-9]+}}
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; CHECKFP-NEXT: .cfi_def_cfa_offset 524280
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; CHECKFP-NEXT: extsp 65535
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; CHECKFP-NEXT: .Ltmp{{[0-9]+}}
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; CHECKFP-NEXT: .cfi_def_cfa_offset 786420
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; CHECKFP-NEXT: extsp 3398
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; CHECKFP-NEXT: .Ltmp{{[0-9]+}}
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; CHECKFP-NEXT: .cfi_def_cfa_offset 800012
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; CHECKFP-NEXT: stw r10, sp[1]
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; CHECKFP-NEXT: .Ltmp{{[0-9]+}}
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; CHECKFP-NEXT: .cfi_offset 10, -800008
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; CHECKFP-NEXT: ldaw r10, sp[0]
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; CHECKFP-NEXT: .Ltmp{{[0-9]+}}
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; CHECKFP-NEXT: .cfi_def_cfa_register 10
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; CHECKFP-NEXT: ldw r1, cp[.LCPI[[CNST0]]]
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; CHECKFP-NEXT: stw [[REG:r[4-9]+]], r10[r1]
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; CHECKFP-NEXT: .Ltmp{{[0-9]+}}
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; CHECKFP-NEXT: .cfi_offset 4, -4
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; CHECKFP-NEXT: mov [[REG]], r0
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; CHECKFP-NEXT: extsp 1
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; CHECKFP-NEXT: ldaw r0, r10[2]
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; CHECKFP-NEXT: bl f5
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; CHECKFP-NEXT: ldaw sp, sp[1]
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; CHECKFP-NEXT: ldw r1, cp[.LCPI3_1]
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; CHECKFP-NEXT: ldaw r0, r10[r1]
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; CHECKFP-NEXT: extsp 1
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; CHECKFP-NEXT: bl f5
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; CHECKFP-NEXT: ldaw sp, sp[1]
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; CHECKFP-NEXT: mov r0, [[REG]]
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; CHECKFP-NEXT: ldw r1, cp[.LCPI[[CNST0]]]
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; CHECKFP-NEXT: ldw [[REG]], r10[r1]
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; CHECKFP-NEXT: set sp, r10
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; CHECKFP-NEXT: ldw r10, sp[1]
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; CHECKFP-NEXT: ldaw sp, sp[65535]
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; CHECKFP-NEXT: ldaw sp, sp[65535]
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; CHECKFP-NEXT: ldaw sp, sp[65535]
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; CHECKFP-NEXT: retsp 3398
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;
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; !FP + large frame: spill SR+SR+R4+LR = entsp 4 + 200000
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; CHECK: .section .cp.rodata.cst4,"aMc",@progbits,4
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; CHECK-NEXT: .align 4
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; CHECK-NEXT: .LCPI[[CNST0:[0-9_]+]]:
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; CHECK-NEXT: .long 200003
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; CHECK-NEXT: .LCPI[[CNST1:[0-9_]+]]:
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; CHECK-NEXT: .long 200002
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; CHECK-NEXT: .text
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; CHECK-LABEL: f6
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; CHECK: entsp 65535
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; CHECK-NEXT: .Ltmp{{[0-9]+}}
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; CHECK-NEXT: .cfi_def_cfa_offset 262140
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; CHECK-NEXT: .Ltmp{{[0-9]+}}
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; CHECK-NEXT: .cfi_offset 15, 0
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; CHECK-NEXT: extsp 65535
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; CHECK-NEXT: .Ltmp{{[0-9]+}}
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; CHECK-NEXT: .cfi_def_cfa_offset 524280
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; CHECK-NEXT: extsp 65535
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; CHECK-NEXT: .Ltmp{{[0-9]+}}
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; CHECK-NEXT: .cfi_def_cfa_offset 786420
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; CHECK-NEXT: extsp 3399
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; CHECK-NEXT: .Ltmp{{[0-9]+}}
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; CHECK-NEXT: .cfi_def_cfa_offset 800016
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; CHECK-NEXT: ldaw r1, sp[0]
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; CHECK-NEXT: ldw r2, cp[.LCPI[[CNST0]]]
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; CHECK-NEXT: stw [[REG:r[4-9]+]], r1[r2]
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; CHECK-NEXT: .Ltmp{{[0-9]+}}
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; CHECK-NEXT: .cfi_offset 4, -4
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; CHECK-NEXT: mov [[REG]], r0
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; CHECK-NEXT: ldaw r0, sp[3]
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; CHECK-NEXT: bl f5
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; CHECK-NEXT: ldaw r0, sp[0]
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; CHECK-NEXT: ldw r1, cp[.LCPI[[CNST1]]]
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; CHECK-NEXT: ldaw r0, r0[r1]
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; CHECK-NEXT: bl f5
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; CHECK-NEXT: mov r0, [[REG]]
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; CHECK-NEXT: ldaw [[REG]], sp[0]
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; CHECK-NEXT: ldw r1, cp[.LCPI[[CNST0]]]
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; CHECK-NEXT: ldw [[REG]], [[REG]][r1]
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; CHECK-NEXT: ldaw sp, sp[65535]
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; CHECK-NEXT: ldaw sp, sp[65535]
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; CHECK-NEXT: ldaw sp, sp[65535]
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; CHECK-NEXT: retsp 3399
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declare void @f5(i32*)
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define i32 @f6(i32 %i) {
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entry:
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%0 = alloca [200000 x i32]
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%1 = getelementptr inbounds [200000 x i32], [200000 x i32]* %0, i32 0, i32 0
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call void @f5(i32* %1)
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%2 = getelementptr inbounds [200000 x i32], [200000 x i32]* %0, i32 0, i32 199999
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call void @f5(i32* %2)
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ret i32 %i
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}
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; FP + large frame: spill FP+SR+LR = entsp 2 + 256 + extsp 1
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; CHECKFP-LABEL:f8
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; CHECKFP: entsp 258
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; CHECKFP-NEXT: stw r10, sp[1]
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; CHECKFP-NEXT: ldaw r10, sp[0]
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; CHECKFP-NEXT: mkmsk [[REG:r[0-9]+]], 8
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; CHECKFP-NEXT: ldaw r0, r10{{\[}}[[REG]]{{\]}}
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; CHECKFP-NEXT: extsp 1
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; CHECKFP-NEXT: bl f5
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; CHECKFP-NEXT: ldaw sp, sp[1]
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; CHECKFP-NEXT: set sp, r10
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; CHECKFP-NEXT: ldw r10, sp[1]
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; CHECKFP-NEXT: retsp 258
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;
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; !FP + large frame: spill SR+SR+LR = entsp 3 + 256
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; CHECK-LABEL:f8
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; CHECK: entsp 257
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; CHECK-NEXT: ldaw r0, sp[254]
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; CHECK-NEXT: bl f5
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; CHECK-NEXT: retsp 257
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define void @f8() nounwind {
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entry:
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%0 = alloca [256 x i32]
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%1 = getelementptr inbounds [256 x i32], [256 x i32]* %0, i32 0, i32 253
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call void @f5(i32* %1)
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ret void
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}
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; FP + large frame: spill FP+SR+LR = entsp 2 + 32768 + extsp 1
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; CHECKFP-LABEL:f9
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; CHECKFP: entsp 32770
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; CHECKFP-NEXT: stw r10, sp[1]
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; CHECKFP-NEXT: ldaw r10, sp[0]
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; CHECKFP-NEXT: ldc [[REG:r[0-9]+]], 32767
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; CHECKFP-NEXT: ldaw r0, r10{{\[}}[[REG]]{{\]}}
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; CHECKFP-NEXT: extsp 1
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; CHECKFP-NEXT: bl f5
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; CHECKFP-NEXT: ldaw sp, sp[1]
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; CHECKFP-NEXT: set sp, r10
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; CHECKFP-NEXT: ldw r10, sp[1]
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; CHECKFP-NEXT: retsp 32770
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;
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; !FP + large frame: spill SR+SR+LR = entsp 3 + 32768
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; CHECK-LABEL:f9
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; CHECK: entsp 32771
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; CHECK-NEXT: ldaw r0, sp[32768]
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; CHECK-NEXT: bl f5
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; CHECK-NEXT: retsp 32771
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define void @f9() nounwind {
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entry:
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%0 = alloca [32768 x i32]
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%1 = getelementptr inbounds [32768 x i32], [32768 x i32]* %0, i32 0, i32 32765
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call void @f5(i32* %1)
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ret void
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}
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