Matt Arsenault 4f17f88071 Fix CodeGen for unaligned loads with address spaces ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193721 91177308-0d34-0410-b5e6-96231b3b80d8

2013-10-30 23:30:05 +00:00

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AArch64

[AArch64] Add support for NEON scalar floating-point compare instructions.

2013-10-30 15:19:37 +00:00

ARM

Convert another llc -filetype=obj test.

2013-10-28 21:12:15 +00:00

CPP

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Generic

Change objectsize intrinsic to accept different address spaces.

2013-10-07 18:06:48 +00:00

Hexagon

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Inputs

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Mips

[mips][msa] Correct definition of bins[lr] and CHECK-DAG-ize related tests

2013-10-30 15:45:42 +00:00

MSP430

Make sure SP is always aligned on a 2 byte boundary

2013-10-24 09:32:31 +00:00

NVPTX

[NVPTX] Switch from StrongPHIElimination to PHIElimination in NVPTXTargetMachine, and add some missing optimization passes to addOptimizedRegAlloc

2013-10-11 12:39:39 +00:00

PowerPC

Convert another llc -filetype=obj test.

2013-10-28 22:17:19 +00:00

R600

Fix CodeGen for unaligned loads with address spaces

2013-10-30 23:30:05 +00:00

SPARC

[Sparc] Disable tail call optimization for sparc64.

2013-10-09 12:50:39 +00:00

SystemZ

[SystemZ] Set usaAA to true

2013-10-28 13:53:37 +00:00

Thumb

17309 ARM backend incorrectly lowers COPY_STRUCT_BYVAL_I32 for thumb1 targets

2013-10-17 19:52:05 +00:00

Thumb2

MachineSink: Fix and tweak critical-edge breaking heuristic.

2013-10-14 16:57:17 +00:00

X86

Produce .weak_def_can_be_hidden for some linkonce_odr values

2013-10-30 22:08:11 +00:00

XCore

XCore target fix bug in emitArrayBound() causing segmentation fault

2013-10-11 10:27:13 +00:00