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https://github.com/c64scene-ar/llvm-6502.git
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72062f5744
This patch adds support for AArch64 (ARM's 64-bit architecture) to
LLVM in the "experimental" category. Currently, it won't be built
unless requested explicitly.
This initial commit should have support for:
+ Assembly of all scalar (i.e. non-NEON, non-Crypto) instructions
(except the late addition CRC instructions).
+ CodeGen features required for C++03 and C99.
+ Compilation for the "small" memory model: code+static data <
4GB.
+ Absolute and position-independent code.
+ GNU-style (i.e. "__thread") TLS.
+ Debugging information.
The principal omission, currently, is performance tuning.
This patch excludes the NEON support also reviewed due to an outbreak of
batshit insanity in our legal department. That will be committed soon bringing
the changes to precisely what has been approved.
Further reviews would be gratefully received.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174054 91177308-0d34-0410-b5e6-96231b3b80d8
60 lines
2.1 KiB
LLVM
60 lines
2.1 KiB
LLVM
; RUN: llc -mtriple=aarch64-none-linux-gnu -relocation-model=pic -o - %s | FileCheck %s
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; Make sure exception-handling PIC code can be linked correctly. An alternative
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; to the sequence described below would have .gcc_except_table itself writable
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; and not use the indirection, but this isn't what LLVM does right now.
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; There should be a read-only .gcc_except_table section...
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; CHECK: .section .gcc_except_table,"a"
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; ... referring indirectly to stubs for its typeinfo ...
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; CHECK: // @TType Encoding = indirect pcrel sdata8
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; ... one of which is "int"'s typeinfo
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; CHECK: .Ltmp9:
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; CHECK-NEXT: .xword .L_ZTIi.DW.stub-.Ltmp9
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; .. and which is properly defined (in a writable section for the dynamic loader) later.
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; CHECK: .section .data.rel,"aw"
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; CHECK: .L_ZTIi.DW.stub:
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; CHECK-NEXT: .xword _ZTIi
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@_ZTIi = external constant i8*
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define i32 @_Z3barv() {
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entry:
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invoke void @_Z3foov()
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to label %return unwind label %lpad
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lpad: ; preds = %entry
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%0 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*)
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catch i8* bitcast (i8** @_ZTIi to i8*)
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%1 = extractvalue { i8*, i32 } %0, 1
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%2 = tail call i32 @llvm.eh.typeid.for(i8* bitcast (i8** @_ZTIi to i8*)) nounwind
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%matches = icmp eq i32 %1, %2
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br i1 %matches, label %catch, label %eh.resume
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catch: ; preds = %lpad
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%3 = extractvalue { i8*, i32 } %0, 0
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%4 = tail call i8* @__cxa_begin_catch(i8* %3) nounwind
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%5 = bitcast i8* %4 to i32*
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%exn.scalar = load i32* %5, align 4
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tail call void @__cxa_end_catch() nounwind
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br label %return
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return: ; preds = %entry, %catch
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%retval.0 = phi i32 [ %exn.scalar, %catch ], [ 42, %entry ]
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ret i32 %retval.0
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eh.resume: ; preds = %lpad
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resume { i8*, i32 } %0
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}
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declare void @_Z3foov()
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declare i32 @__gxx_personality_v0(...)
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declare i32 @llvm.eh.typeid.for(i8*) nounwind readnone
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declare i8* @__cxa_begin_catch(i8*)
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declare void @__cxa_end_catch() |