Matthias Braun 5101c89f13 Do not track subregister liveness when it brings no benefits ... Some subregisters are only to indicate different access sizes, while not providing any way to actually divide the register up into multiple disjunct parts. Avoid tracking subregister liveness in these cases as it is not beneficial. Differential Revision: http://reviews.llvm.org/D8429 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232695 91177308-0d34-0410-b5e6-96231b3b80d8		2015-03-19 00:21:58 +00:00
..
CostTable.h	Add a overload to CostTable which allows it to infer the size of the table.	2013-08-09 19:33:32 +00:00
Target.td	Reverted 230471 - gather scatter handling in table gen.	2015-03-01 08:23:41 +00:00
TargetCallingConv.h	AArch64: Safely handle the incoming sret call argument.	2015-02-16 18:10:47 +00:00
TargetCallingConv.td	[mips] Remove MipsCC::analyzeCallOperands in favour of CCState::AnalyzeCallOperands. NFC	2014-11-07 11:43:49 +00:00
TargetFrameLowering.h	[X86] Convert esp-relative movs of function arguments to pushes, step 2	2015-02-01 16:56:04 +00:00
TargetInstrInfo.h	ArrayRefize memory operand folding. NFC.	2015-02-28 12:04:00 +00:00
TargetIntrinsicInfo.h	Removing LLVM_DELETED_FUNCTION, as MSVC 2012 was the last reason for requiring the macro. NFC; LLVM edition.	2015-02-15 22:54:22 +00:00
TargetItinerary.td	I'm introducing a new machine model to simultaneously allow simple	2012-07-07 04:00:00 +00:00
TargetLowering.h	clang-format these lines to fix Visual C++ warning.	2015-03-18 12:50:00 +00:00
TargetLoweringObjectFile.h	COFF: Let globals with private linkage reside in their own section	2015-03-17 23:54:51 +00:00
TargetMachine.h	Revert "Add a TargetMachine local MCRegisterInfo and MCInstrInfo so that"	2015-03-18 20:41:44 +00:00
TargetOpcodes.h	Add the llvm.frameallocate and llvm.recoverframeallocation intrinsics	2015-01-13 00:48:10 +00:00
TargetOptions.h	Add r228980 back.	2015-02-17 20:48:01 +00:00
TargetRegisterInfo.h	Do not track subregister liveness when it brings no benefits	2015-03-19 00:21:58 +00:00
TargetSchedule.td	Move Post RA Scheduling flag bit into SchedMachineModel	2014-07-15 22:39:58 +00:00
TargetSelectionDAG.td	[TableGen] Add support constraining a vector type in a pattern to have a specific element type and for constraining a vector type to have the same number of elements as another vector type. This is useful for AVX512 mask operations so we relate the mask type to the type of the other arguments.	2015-03-05 07:11:34 +00:00
TargetSelectionDAGInfo.h	Removing LLVM_DELETED_FUNCTION, as MSVC 2012 was the last reason for requiring the macro. NFC; LLVM edition.	2015-02-15 22:54:22 +00:00
TargetSubtargetInfo.h	Remove useMachineScheduler and replace it with subtarget options	2015-03-11 22:56:10 +00:00