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https://github.com/c64scene-ar/llvm-6502.git
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f0144127b9
it is highly specific to the object file that will be generated in the end, this introduces a new TargetLoweringObjectFile interface that is implemented for each of ELF/MachO/COFF/Alpha/PIC16 and XCore. Though still is still a brutal and ugly refactoring, this is a major step towards goodness. This patch also: 1. fixes a bunch of dangling pointer problems in the PIC16 backend. 2. disables the TargetLowering copy ctor which PIC16 was accidentally using. 3. gets us closer to xcore having its own crazy target section flags and pic16 not having to shadow sections with its own objects. 4. fixes wierdness where ELF targets would set CStringSection but not CStringSection_. Factor the code better. 5. fixes some bugs in string lowering on ELF targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77294 91177308-0d34-0410-b5e6-96231b3b80d8
246 lines
8.9 KiB
C++
246 lines
8.9 KiB
C++
//===-- X86TargetMachine.cpp - Define TargetMachine for the X86 -----------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the X86 specific subclass of TargetMachine.
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//
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//===----------------------------------------------------------------------===//
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#include "X86TargetAsmInfo.h"
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#include "X86TargetMachine.h"
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#include "X86.h"
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#include "llvm/Module.h"
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#include "llvm/PassManager.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/Support/FormattedStream.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/Target/TargetRegistry.h"
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using namespace llvm;
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extern "C" void LLVMInitializeX86Target() {
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// Register the target.
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RegisterTargetMachine<X86_32TargetMachine> X(TheX86_32Target);
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RegisterTargetMachine<X86_64TargetMachine> Y(TheX86_64Target);
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}
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const TargetAsmInfo *X86TargetMachine::createTargetAsmInfo() const {
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if (Subtarget.isFlavorIntel())
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return new X86WinTargetAsmInfo(*this);
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switch (Subtarget.TargetType) {
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default: llvm_unreachable("unknown subtarget type");
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case X86Subtarget::isDarwin:
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return new X86DarwinTargetAsmInfo(*this);
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case X86Subtarget::isELF:
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return new X86ELFTargetAsmInfo(*this);
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case X86Subtarget::isMingw:
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case X86Subtarget::isCygwin:
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return new X86COFFTargetAsmInfo(*this);
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case X86Subtarget::isWindows:
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return new X86WinTargetAsmInfo(*this);
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}
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}
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X86_32TargetMachine::X86_32TargetMachine(const Target &T, const Module &M,
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const std::string &FS)
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: X86TargetMachine(T, M, FS, false) {
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}
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X86_64TargetMachine::X86_64TargetMachine(const Target &T, const Module &M,
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const std::string &FS)
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: X86TargetMachine(T, M, FS, true) {
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}
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/// X86TargetMachine ctor - Create an X86 target.
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///
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X86TargetMachine::X86TargetMachine(const Target &T, const Module &M,
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const std::string &FS, bool is64Bit)
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: LLVMTargetMachine(T),
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Subtarget(M, FS, is64Bit),
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DataLayout(Subtarget.getDataLayout()),
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FrameInfo(TargetFrameInfo::StackGrowsDown,
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Subtarget.getStackAlignment(), Subtarget.is64Bit() ? -8 : -4),
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InstrInfo(*this), JITInfo(*this), TLInfo(*this), ELFWriterInfo(*this) {
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DefRelocModel = getRelocationModel();
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// If no relocation model was picked, default as appropriate for the target.
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if (getRelocationModel() == Reloc::Default) {
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if (!Subtarget.isTargetDarwin())
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setRelocationModel(Reloc::Static);
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else if (Subtarget.is64Bit())
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setRelocationModel(Reloc::PIC_);
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else
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setRelocationModel(Reloc::DynamicNoPIC);
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}
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assert(getRelocationModel() != Reloc::Default &&
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"Relocation mode not picked");
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// If no code model is picked, default to small.
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if (getCodeModel() == CodeModel::Default)
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setCodeModel(CodeModel::Small);
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// ELF and X86-64 don't have a distinct DynamicNoPIC model. DynamicNoPIC
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// is defined as a model for code which may be used in static or dynamic
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// executables but not necessarily a shared library. On X86-32 we just
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// compile in -static mode, in x86-64 we use PIC.
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if (getRelocationModel() == Reloc::DynamicNoPIC) {
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if (is64Bit)
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setRelocationModel(Reloc::PIC_);
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else if (!Subtarget.isTargetDarwin())
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setRelocationModel(Reloc::Static);
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}
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// If we are on Darwin, disallow static relocation model in X86-64 mode, since
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// the Mach-O file format doesn't support it.
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if (getRelocationModel() == Reloc::Static &&
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Subtarget.isTargetDarwin() &&
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is64Bit)
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setRelocationModel(Reloc::PIC_);
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// Determine the PICStyle based on the target selected.
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if (getRelocationModel() == Reloc::Static) {
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// Unless we're in PIC or DynamicNoPIC mode, set the PIC style to None.
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Subtarget.setPICStyle(PICStyles::None);
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} else if (Subtarget.isTargetCygMing()) {
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Subtarget.setPICStyle(PICStyles::None);
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} else if (Subtarget.isTargetDarwin()) {
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if (Subtarget.is64Bit())
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Subtarget.setPICStyle(PICStyles::RIPRel);
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else if (getRelocationModel() == Reloc::PIC_)
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Subtarget.setPICStyle(PICStyles::StubPIC);
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else {
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assert(getRelocationModel() == Reloc::DynamicNoPIC);
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Subtarget.setPICStyle(PICStyles::StubDynamicNoPIC);
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}
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} else if (Subtarget.isTargetELF()) {
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if (Subtarget.is64Bit())
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Subtarget.setPICStyle(PICStyles::RIPRel);
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else
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Subtarget.setPICStyle(PICStyles::GOT);
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}
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// Finally, if we have "none" as our PIC style, force to static mode.
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if (Subtarget.getPICStyle() == PICStyles::None)
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setRelocationModel(Reloc::Static);
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}
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//===----------------------------------------------------------------------===//
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// Pass Pipeline Configuration
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//===----------------------------------------------------------------------===//
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bool X86TargetMachine::addInstSelector(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel) {
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// Install an instruction selector.
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PM.add(createX86ISelDag(*this, OptLevel));
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// If we're using Fast-ISel, clean up the mess.
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if (EnableFastISel)
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PM.add(createDeadMachineInstructionElimPass());
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// Install a pass to insert x87 FP_REG_KILL instructions, as needed.
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PM.add(createX87FPRegKillInserterPass());
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return false;
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}
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bool X86TargetMachine::addPreRegAlloc(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel) {
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// Calculate and set max stack object alignment early, so we can decide
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// whether we will need stack realignment (and thus FP).
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PM.add(createX86MaxStackAlignmentCalculatorPass());
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return false; // -print-machineinstr shouldn't print after this.
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}
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bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel) {
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PM.add(createX86FloatingPointStackifierPass());
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return true; // -print-machineinstr should print after this.
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}
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bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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MachineCodeEmitter &MCE) {
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// FIXME: Move this to TargetJITInfo!
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// On Darwin, do not override 64-bit setting made in X86TargetMachine().
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if (DefRelocModel == Reloc::Default &&
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(!Subtarget.isTargetDarwin() || !Subtarget.is64Bit())) {
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setRelocationModel(Reloc::Static);
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Subtarget.setPICStyle(PICStyles::None);
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}
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// 64-bit JIT places everything in the same buffer except external functions.
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// On Darwin, use small code model but hack the call instruction for
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// externals. Elsewhere, do not assume globals are in the lower 4G.
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if (Subtarget.is64Bit()) {
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if (Subtarget.isTargetDarwin())
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setCodeModel(CodeModel::Small);
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else
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setCodeModel(CodeModel::Large);
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}
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PM.add(createX86CodeEmitterPass(*this, MCE));
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return false;
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}
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bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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JITCodeEmitter &JCE) {
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// FIXME: Move this to TargetJITInfo!
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// On Darwin, do not override 64-bit setting made in X86TargetMachine().
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if (DefRelocModel == Reloc::Default &&
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(!Subtarget.isTargetDarwin() || !Subtarget.is64Bit())) {
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setRelocationModel(Reloc::Static);
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Subtarget.setPICStyle(PICStyles::None);
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}
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// 64-bit JIT places everything in the same buffer except external functions.
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// On Darwin, use small code model but hack the call instruction for
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// externals. Elsewhere, do not assume globals are in the lower 4G.
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if (Subtarget.is64Bit()) {
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if (Subtarget.isTargetDarwin())
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setCodeModel(CodeModel::Small);
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else
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setCodeModel(CodeModel::Large);
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}
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PM.add(createX86JITCodeEmitterPass(*this, JCE));
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return false;
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}
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bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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ObjectCodeEmitter &OCE) {
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PM.add(createX86ObjectCodeEmitterPass(*this, OCE));
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return false;
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}
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bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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MachineCodeEmitter &MCE) {
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PM.add(createX86CodeEmitterPass(*this, MCE));
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return false;
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}
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bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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JITCodeEmitter &JCE) {
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PM.add(createX86JITCodeEmitterPass(*this, JCE));
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return false;
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}
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bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel,
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ObjectCodeEmitter &OCE) {
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PM.add(createX86ObjectCodeEmitterPass(*this, OCE));
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return false;
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}
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