Andrea Di Biagio 5144469bb4 [DAGCombiner] Avoid introducing an illegal build_vector when folding a sign_extend. ... Make sure that we don't introduce illegal build_vector dag nodes when trying to fold a sign_extend of a build_vector. This fixes a regression introduced by r200234. Added test CodeGen/X86/fold-vector-sext-crash.ll to verify that llc no longer crashes with an assertion failure due to an illegal build_vector of type MVT::v4i64. Thanks to Ilia Filippov for spotting this regression and for providing a reproducible test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200313 91177308-0d34-0410-b5e6-96231b3b80d8		2014-01-28 12:53:56 +00:00
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AArch64	[AArch64 NEON] Try to generate CONCAT_VECTOR when lowering BUILD_VECTOR or SHUFFLE_VECTOR.	2014-01-27 02:53:54 +00:00
ARM	Fix unsupported addressing mode assertion for pld	2014-01-27 21:39:04 +00:00
CPP
Generic	Additional fix for 200201: due to dependence on bitwidth test was moved to X86 directory.	2014-01-27 09:43:10 +00:00
Hexagon
Inputs
Mips	[DAGCombiner] Teach how to fold sext/aext/zext of constant build vectors.	2014-01-27 18:45:30 +00:00
MSP430
NVPTX
PowerPC	Handle spilling the PPC GPRC_NOR0 register class	2014-01-28 05:32:58 +00:00
R600	R600/SI: Add pattern for truncating i32 to i1	2014-01-28 03:01:16 +00:00
SPARC	Fix the DWARF EH encodings for Sparc PIC code.	2014-01-28 02:52:26 +00:00
SystemZ
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X86	[DAGCombiner] Avoid introducing an illegal build_vector when folding a sign_extend.	2014-01-28 12:53:56 +00:00
XCore