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fba5b65942
that control, individually, all of the disparate things it was controlling. At the same time move a FIXME in the Hexagon port to a new subtarget function that will enable a user of the machine scheduler to avoid using the source scheduler for pre-RA-scheduling. The FIXME would have this removed, but involves either testcase changes or adding -pre-RA-sched=source to a few testcases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231980 91177308-0d34-0410-b5e6-96231b3b80d8
108 lines
3.4 KiB
C++
108 lines
3.4 KiB
C++
//===-- HexagonSubtarget.h - Define Subtarget for the Hexagon ---*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the Hexagon specific subclass of TargetSubtarget.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONSUBTARGET_H
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#define LLVM_LIB_TARGET_HEXAGON_HEXAGONSUBTARGET_H
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#include "HexagonFrameLowering.h"
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#include "HexagonISelLowering.h"
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#include "HexagonInstrInfo.h"
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#include "HexagonSelectionDAGInfo.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetSubtargetInfo.h"
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#include <string>
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#define GET_SUBTARGETINFO_HEADER
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#include "HexagonGenSubtargetInfo.inc"
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#define Hexagon_SMALL_DATA_THRESHOLD 8
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#define Hexagon_SLOTS 4
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namespace llvm {
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class HexagonSubtarget : public HexagonGenSubtargetInfo {
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virtual void anchor();
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bool UseMemOps;
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bool ModeIEEERndNear;
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public:
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enum HexagonArchEnum {
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V4, V5
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};
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HexagonArchEnum HexagonArchVersion;
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private:
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std::string CPUString;
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HexagonInstrInfo InstrInfo;
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HexagonTargetLowering TLInfo;
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HexagonSelectionDAGInfo TSInfo;
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HexagonFrameLowering FrameLowering;
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InstrItineraryData InstrItins;
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public:
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HexagonSubtarget(StringRef TT, StringRef CPU, StringRef FS,
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const TargetMachine &TM);
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/// getInstrItins - Return the instruction itineraries based on subtarget
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/// selection.
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const InstrItineraryData *getInstrItineraryData() const override {
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return &InstrItins;
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}
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const HexagonInstrInfo *getInstrInfo() const override { return &InstrInfo; }
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const HexagonRegisterInfo *getRegisterInfo() const override {
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return &InstrInfo.getRegisterInfo();
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}
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const HexagonTargetLowering *getTargetLowering() const override {
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return &TLInfo;
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}
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const HexagonFrameLowering *getFrameLowering() const override {
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return &FrameLowering;
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}
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const HexagonSelectionDAGInfo *getSelectionDAGInfo() const override {
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return &TSInfo;
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}
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HexagonSubtarget &initializeSubtargetDependencies(StringRef CPU,
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StringRef FS);
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/// ParseSubtargetFeatures - Parses features string setting specified
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/// subtarget options. Definition of function is auto generated by tblgen.
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void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
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bool useMemOps() const { return UseMemOps; }
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bool hasV5TOps() const { return getHexagonArchVersion() >= V5; }
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bool hasV5TOpsOnly() const { return getHexagonArchVersion() == V5; }
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bool modeIEEERndNear() const { return ModeIEEERndNear; }
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bool enableMachineScheduler() const override;
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// Always use the TargetLowering default scheduler.
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// FIXME: This will use the vliw scheduler which is probably just hurting
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// compiler time and will be removed eventually anyway.
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bool enableMachineSchedDefaultSched() const override { return false; }
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const std::string &getCPUString () const { return CPUString; }
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// Threshold for small data section
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unsigned getSmallDataThreshold() const {
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return Hexagon_SMALL_DATA_THRESHOLD;
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}
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const HexagonArchEnum &getHexagonArchVersion() const {
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return HexagonArchVersion;
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}
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};
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} // end namespace llvm
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#endif
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