Andrew Trick 51f6747b23 Change the default latency for implicit defs. ... Implicit defs are not currently positional and not modeled by the per-operand machine model. Unfortunately, we treat defs that are part of the architectural instruction description, like flags, the same as other implicit defs. Really, they should have a fixed MachineInstr layout and probably shouldn't be "implicit" at all. For now, we'll change the default latency to be the max operand latency. That will give flag setting operands full latency for x86 folded loads. Other kinds of "fake" implicit defs don't occur prior to regalloc anyway, and we would like them to go away postRegAlloc as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177227 91177308-0d34-0410-b5e6-96231b3b80d8		2013-03-16 18:58:57 +00:00
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Analysis	Small fix for cost analysis of ptrtoint.	2013-03-12 13:18:30 +00:00
Archive	Fix auto_ptr is deprecated warnings	2013-02-26 21:20:35 +00:00
AsmParser	Unify clang/llvm attributes for asan/tsan/msan (LLVM part)	2013-02-26 06:58:09 +00:00
Bitcode	Simplify code. No functionality change.	2013-02-19 09:48:30 +00:00
CodeGen	Change the default latency for implicit defs.	2013-03-16 18:58:57 +00:00
DebugInfo	Code cleanup: pass Offset by pointer to parseInstruction to more explicitly	2013-02-22 00:50:48 +00:00
ExecutionEngine	Formatting, grammar	2013-02-20 18:24:34 +00:00
IR	Remove the unused 4th operand for DIFile debug info metadata	2013-03-13 22:05:21 +00:00
Linker	Clean up out-of-date comments and some stray whitespace	2013-03-08 22:29:44 +00:00
MC	Fix the FDE encoding to be relative on ELF.	2013-03-15 05:51:57 +00:00
Object	Move an assert earlier in a file and check that the result of	2013-02-28 20:26:17 +00:00
Option	Resort the #include lines in include/... and lib/... with the	2013-01-02 10:22:59 +00:00
Support	[Support][Path][Windows] Fix dangling else. Don't call CloseHandle when CloseFD is false.	2013-03-15 19:25:47 +00:00
TableGen	[TableGen] Fix ICE on MSVC 2012 Release builds.	2013-02-26 21:29:47 +00:00
Target	Add X86 code emitter support AVX encoded MRMDestReg instructions.	2013-03-16 03:44:31 +00:00
Transforms	LoopVectorize: Invert case when we use a vector cmp value to query select cost	2013-03-14 18:54:36 +00:00
CMakeLists.txt	Rename VMCore directory to IR.	2013-01-02 09:10:48 +00:00
LLVMBuild.txt	Rename VMCore directory to IR.	2013-01-02 09:10:48 +00:00
Makefile	Rename VMCore directory to IR.	2013-01-02 09:10:48 +00:00