mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-15 20:29:48 +00:00
7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
254 lines
5.3 KiB
LLVM
254 lines
5.3 KiB
LLVM
; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+tbm < %s | FileCheck %s
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define i32 @test_x86_tbm_bextri_u32(i32 %a) nounwind readnone {
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entry:
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; CHECK-LABEL: test_x86_tbm_bextri_u32:
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; CHECK-NOT: mov
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; CHECK: bextr $
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%0 = lshr i32 %a, 4
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%1 = and i32 %0, 4095
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ret i32 %1
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}
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define i32 @test_x86_tbm_bextri_u32_m(i32* nocapture %a) nounwind readonly {
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entry:
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; CHECK-LABEL: test_x86_tbm_bextri_u32_m:
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; CHECK-NOT: mov
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; CHECK: bextr $
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%0 = load i32, i32* %a
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%1 = lshr i32 %0, 4
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%2 = and i32 %1, 4095
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ret i32 %2
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}
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define i64 @test_x86_tbm_bextri_u64(i64 %a) nounwind readnone {
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entry:
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; CHECK-LABEL: test_x86_tbm_bextri_u64:
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; CHECK-NOT: mov
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; CHECK: bextr $
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%0 = lshr i64 %a, 4
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%1 = and i64 %0, 4095
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ret i64 %1
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}
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define i64 @test_x86_tbm_bextri_u64_m(i64* nocapture %a) nounwind readonly {
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entry:
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; CHECK-LABEL: test_x86_tbm_bextri_u64_m:
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; CHECK-NOT: mov
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; CHECK: bextr $
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%0 = load i64, i64* %a
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%1 = lshr i64 %0, 4
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%2 = and i64 %1, 4095
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ret i64 %2
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}
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define i32 @test_x86_tbm_blcfill_u32(i32 %a) nounwind readnone {
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entry:
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; CHECK-LABEL: test_x86_tbm_blcfill_u32:
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; CHECK-NOT: mov
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; CHECK: blcfill %
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%0 = add i32 %a, 1
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%1 = and i32 %0, %a
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ret i32 %1
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}
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define i64 @test_x86_tbm_blcfill_u64(i64 %a) nounwind readnone {
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entry:
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; CHECK-LABEL: test_x86_tbm_blcfill_u64:
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; CHECK-NOT: mov
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; CHECK: blcfill %
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%0 = add i64 %a, 1
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%1 = and i64 %0, %a
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ret i64 %1
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}
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define i32 @test_x86_tbm_blci_u32(i32 %a) nounwind readnone {
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entry:
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; CHECK-LABEL: test_x86_tbm_blci_u32:
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; CHECK-NOT: mov
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; CHECK: blci %
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%0 = add i32 1, %a
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%1 = xor i32 %0, -1
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%2 = or i32 %1, %a
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ret i32 %2
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}
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define i64 @test_x86_tbm_blci_u64(i64 %a) nounwind readnone {
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entry:
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; CHECK-LABEL: test_x86_tbm_blci_u64:
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; CHECK-NOT: mov
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; CHECK: blci %
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%0 = add i64 1, %a
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%1 = xor i64 %0, -1
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%2 = or i64 %1, %a
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ret i64 %2
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}
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define i32 @test_x86_tbm_blci_u32_b(i32 %a) nounwind readnone {
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entry:
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; CHECK-LABEL: test_x86_tbm_blci_u32_b:
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; CHECK-NOT: mov
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; CHECK: blci %
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%0 = sub i32 -2, %a
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%1 = or i32 %0, %a
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ret i32 %1
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}
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define i64 @test_x86_tbm_blci_u64_b(i64 %a) nounwind readnone {
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entry:
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; CHECK-LABEL: test_x86_tbm_blci_u64_b:
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; CHECK-NOT: mov
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; CHECK: blci %
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%0 = sub i64 -2, %a
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%1 = or i64 %0, %a
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ret i64 %1
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}
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define i32 @test_x86_tbm_blcic_u32(i32 %a) nounwind readnone {
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entry:
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; CHECK-LABEL: test_x86_tbm_blcic_u32:
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; CHECK-NOT: mov
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; CHECK: blcic %
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%0 = xor i32 %a, -1
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%1 = add i32 %a, 1
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%2 = and i32 %1, %0
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ret i32 %2
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}
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define i64 @test_x86_tbm_blcic_u64(i64 %a) nounwind readnone {
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entry:
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; CHECK-LABEL: test_x86_tbm_blcic_u64:
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; CHECK-NOT: mov
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; CHECK: blcic %
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%0 = xor i64 %a, -1
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%1 = add i64 %a, 1
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%2 = and i64 %1, %0
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ret i64 %2
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}
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define i32 @test_x86_tbm_blcmsk_u32(i32 %a) nounwind readnone {
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entry:
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; CHECK-LABEL: test_x86_tbm_blcmsk_u32:
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; CHECK-NOT: mov
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; CHECK: blcmsk %
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%0 = add i32 %a, 1
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%1 = xor i32 %0, %a
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ret i32 %1
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}
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define i64 @test_x86_tbm_blcmsk_u64(i64 %a) nounwind readnone {
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entry:
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; CHECK-LABEL: test_x86_tbm_blcmsk_u64:
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; CHECK-NOT: mov
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; CHECK: blcmsk %
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%0 = add i64 %a, 1
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%1 = xor i64 %0, %a
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ret i64 %1
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}
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define i32 @test_x86_tbm_blcs_u32(i32 %a) nounwind readnone {
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entry:
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; CHECK-LABEL: test_x86_tbm_blcs_u32:
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; CHECK-NOT: mov
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; CHECK: blcs %
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%0 = add i32 %a, 1
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%1 = or i32 %0, %a
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ret i32 %1
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}
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define i64 @test_x86_tbm_blcs_u64(i64 %a) nounwind readnone {
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entry:
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; CHECK-LABEL: test_x86_tbm_blcs_u64:
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; CHECK-NOT: mov
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; CHECK: blcs %
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%0 = add i64 %a, 1
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%1 = or i64 %0, %a
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ret i64 %1
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}
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define i32 @test_x86_tbm_blsfill_u32(i32 %a) nounwind readnone {
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entry:
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; CHECK-LABEL: test_x86_tbm_blsfill_u32:
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; CHECK-NOT: mov
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; CHECK: blsfill %
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%0 = add i32 %a, -1
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%1 = or i32 %0, %a
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ret i32 %1
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}
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define i64 @test_x86_tbm_blsfill_u64(i64 %a) nounwind readnone {
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entry:
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; CHECK-LABEL: test_x86_tbm_blsfill_u64:
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; CHECK-NOT: mov
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; CHECK: blsfill %
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%0 = add i64 %a, -1
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%1 = or i64 %0, %a
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ret i64 %1
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}
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define i32 @test_x86_tbm_blsic_u32(i32 %a) nounwind readnone {
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entry:
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; CHECK-LABEL: test_x86_tbm_blsic_u32:
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; CHECK-NOT: mov
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; CHECK: blsic %
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%0 = xor i32 %a, -1
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%1 = add i32 %a, -1
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%2 = or i32 %0, %1
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ret i32 %2
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}
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define i64 @test_x86_tbm_blsic_u64(i64 %a) nounwind readnone {
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entry:
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; CHECK-LABEL: test_x86_tbm_blsic_u64:
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; CHECK-NOT: mov
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; CHECK: blsic %
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%0 = xor i64 %a, -1
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%1 = add i64 %a, -1
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%2 = or i64 %0, %1
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ret i64 %2
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}
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define i32 @test_x86_tbm_t1mskc_u32(i32 %a) nounwind readnone {
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entry:
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; CHECK-LABEL: test_x86_tbm_t1mskc_u32:
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; CHECK-NOT: mov
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; CHECK: t1mskc %
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%0 = xor i32 %a, -1
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%1 = add i32 %a, 1
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%2 = or i32 %0, %1
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ret i32 %2
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}
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define i64 @Ttest_x86_tbm_t1mskc_u64(i64 %a) nounwind readnone {
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entry:
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; CHECK-LABEL: test_x86_tbm_t1mskc_u64:
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; CHECK-NOT: mov
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; CHECK: t1mskc %
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%0 = xor i64 %a, -1
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%1 = add i64 %a, 1
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%2 = or i64 %0, %1
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ret i64 %2
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}
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define i32 @test_x86_tbm_tzmsk_u32(i32 %a) nounwind readnone {
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entry:
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; CHECK-LABEL: test_x86_tbm_tzmsk_u32:
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; CHECK-NOT: mov
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; CHECK: tzmsk %
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%0 = xor i32 %a, -1
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%1 = add i32 %a, -1
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%2 = and i32 %0, %1
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ret i32 %2
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}
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define i64 @test_x86_tbm_tzmsk_u64(i64 %a) nounwind readnone {
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entry:
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; CHECK-LABEL: test_x86_tbm_tzmsk_u64:
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; CHECK-NOT: mov
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; CHECK: tzmsk %
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%0 = xor i64 %a, -1
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%1 = add i64 %a, -1
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%2 = and i64 %0, %1
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ret i64 %2
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}
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