llvm-6502/test/CodeGen
Bill Schmidt 527388dea5 This patch is in preparation for adding medium code model support to the
PPC64 target.  The five tests modified herein test code generation that is
sensitive to the code model selected.  So I've added -code-model=small to
the RUN commands for each.

Since small code model is the default, this has no effect for now; but this
prepares us for eventually changing the default to medium code model for PPC64.

Test changes verified with small and medium code model as default on
powerpc64-unknown-linux-gnu.  All tests continue to pass.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167999 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-14 23:23:27 +00:00
..
ARM The code pattern "imm0_255_neg" is used for checking if an immediate value is a small negative number. 2012-11-14 19:39:15 +00:00
CPP test commit 2012-07-18 17:53:05 +00:00
Generic Codegen support for arbitrary vector getelementptrs. 2012-11-13 13:01:58 +00:00
Hexagon test/CodeGen/Hexagon/postinc-load.ll: Suppress it for now. It triggered the failure on i686 hosts. 2012-11-14 22:22:37 +00:00
MBlaze
Mips [mips] Custom-lower ISD::FRAME_TO_ARGS_OFFSET node. 2012-11-07 19:10:58 +00:00
MSP430 Fix fallout from RegInfo => FrameLowering refactoring on MSP430. 2012-10-17 17:37:11 +00:00
NVPTX [NVPTX] Implement custom lowering of loads/stores for i1 2012-11-14 19:19:16 +00:00
PowerPC This patch is in preparation for adding medium code model support to the 2012-11-14 23:23:27 +00:00
SPARC Use TargetTransformInfo to control switch-to-lookup table transformation 2012-10-30 11:23:25 +00:00
Thumb Convert an improper CodeGen test to a MC test. 2012-11-10 04:30:40 +00:00
Thumb2 Add GPRPair Register class to ARM. 2012-10-26 21:29:15 +00:00
X86 Make sure to not get AVX code on an AVX-capable host. Revealed in r167967. 2012-11-14 22:24:01 +00:00
XCore Fix pattern for MKMSK instruction. 2012-06-13 17:59:12 +00:00