llvm-6502/lib/Target/PTX/PTXRegAlloc.cpp
Andrew Trick 8dd26253f5 RegAlloc superpass: includes phi elimination, coalescing, and scheduling.
Creates a configurable regalloc pipeline.

Ensure specific llc options do what they say and nothing more: -reglloc=... has no effect other than selecting the allocator pass itself. This patch introduces a new umbrella flag, "-optimize-regalloc", to enable/disable the optimizing regalloc "superpass". This allows for example testing coalscing and scheduling under -O0 or vice-versa.

When a CodeGen pass requires the MachineFunction to have a particular property, we need to explicitly define that property so it can be directly queried rather than naming a specific Pass. For example, to check for SSA, use MRI->isSSA, not addRequired<PHIElimination>.

CodeGen transformation passes are never "required" as an analysis

ProcessImplicitDefs does not require LiveVariables.

We have a plan to massively simplify some of the early passes within the regalloc superpass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150226 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-10 04:10:36 +00:00

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//===-- PTXRegAlloc.cpp - PTX Register Allocator --------------------------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file contains a register allocator for PTX code.
//
//===----------------------------------------------------------------------===//
#define DEBUG_TYPE "ptx-reg-alloc"
#include "PTX.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/RegAllocRegistry.h"
using namespace llvm;
namespace {
// Special register allocator for PTX.
class PTXRegAlloc : public MachineFunctionPass {
public:
static char ID;
PTXRegAlloc() : MachineFunctionPass(ID) {}
virtual const char* getPassName() const {
return "PTX Register Allocator";
}
virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesCFG();
MachineFunctionPass::getAnalysisUsage(AU);
}
virtual bool runOnMachineFunction(MachineFunction &MF) {
// We do not actually do anything (at least not yet).
return false;
}
};
char PTXRegAlloc::ID = 0;
static RegisterRegAlloc
ptxRegAlloc("ptx", "PTX register allocator", createPTXRegisterAllocator);
}
FunctionPass *llvm::createPTXRegisterAllocator() {
return new PTXRegAlloc();
}