mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-16 11:30:51 +00:00
7248968fa5
This is the next big chunk of fast-isel code. The primary purpose is to implement selection of loads and stores, but there is a lot of drag-along to support this. The common code to analyze addresses for both loads and stores is substantial. It's also necessary to add the materialization code for global values. Related to load-store processing is the code to fold loads into integer extends, since otherwise we generate lots of redundant instructions. We also need to add some overrides to some FastEmit routines to ensure we don't assign GPR 0 to a virtual register when this would change the meaning of an instruction. I added handling selection of a few binary arithmetic instructions, to enable committing some test cases I wrote a while back. Finally, ap couple of miscellaneous changes: * I cleaned up some poor style from a previous patch in PPCISelLowering.cpp, pointed out by David Blaikie. * I enlarged the Addr.Offset field to avoid sign problems with 32-bit offsets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189636 91177308-0d34-0410-b5e6-96231b3b80d8
203 lines
4.1 KiB
LLVM
203 lines
4.1 KiB
LLVM
; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=ELF64
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; This test verifies that load/store instructions are properly generated,
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; and that they pass MI verification.
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@a = global i8 1, align 1
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@b = global i16 2, align 2
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@c = global i32 4, align 4
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@d = global i64 8, align 8
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@e = global float 1.25, align 4
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@f = global double 3.5, align 8
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%struct.s = type<{ i8, i32 }>
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%struct.t = type<{ i8, i64 }>
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@g = global %struct.s <{ i8 1, i32 2 }>, align 1
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@h = global %struct.t <{ i8 1, i64 2 }>, align 1
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@i = common global [8192 x i64] zeroinitializer, align 8
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; load
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define i8 @t1() nounwind uwtable ssp {
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; ELF64: t1
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%1 = load i8* @a, align 1
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; ELF64: lbz
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%2 = add nsw i8 %1, 1
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; ELF64: addi
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ret i8 %2
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}
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define i16 @t2() nounwind uwtable ssp {
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; ELF64: t2
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%1 = load i16* @b, align 2
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; ELF64: lhz
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%2 = add nsw i16 %1, 1
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; ELF64: addi
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ret i16 %2
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}
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define i32 @t3() nounwind uwtable ssp {
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; ELF64: t3
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%1 = load i32* @c, align 4
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; ELF64: lwz
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%2 = add nsw i32 %1, 1
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; ELF64: addi
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ret i32 %2
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}
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define i64 @t4() nounwind uwtable ssp {
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; ELF64: t4
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%1 = load i64* @d, align 4
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; ELF64: ld
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%2 = add nsw i64 %1, 1
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; ELF64: addi
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ret i64 %2
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}
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define float @t5() nounwind uwtable ssp {
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; ELF64: t5
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%1 = load float* @e, align 4
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; ELF64: lfs
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%2 = fadd float %1, 1.0
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; ELF64: fadds
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ret float %2
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}
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define double @t6() nounwind uwtable ssp {
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; ELF64: t6
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%1 = load double* @f, align 8
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; ELF64: lfd
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%2 = fadd double %1, 1.0
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; ELF64: fadd
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ret double %2
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}
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; store
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define void @t7(i8 %v) nounwind uwtable ssp {
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; ELF64: t7
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%1 = add nsw i8 %v, 1
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store i8 %1, i8* @a, align 1
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; ELF64: addis
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; ELF64: addi
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; ELF64: addi
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; ELF64: stb
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ret void
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}
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define void @t8(i16 %v) nounwind uwtable ssp {
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; ELF64: t8
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%1 = add nsw i16 %v, 1
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store i16 %1, i16* @b, align 2
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; ELF64: addis
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; ELF64: addi
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; ELF64: addi
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; ELF64: sth
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ret void
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}
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define void @t9(i32 %v) nounwind uwtable ssp {
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; ELF64: t9
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%1 = add nsw i32 %v, 1
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store i32 %1, i32* @c, align 4
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; ELF64: addis
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; ELF64: addi
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; ELF64: addi
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; ELF64: stw
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ret void
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}
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define void @t10(i64 %v) nounwind uwtable ssp {
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; ELF64: t10
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%1 = add nsw i64 %v, 1
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store i64 %1, i64* @d, align 4
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; ELF64: addis
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; ELF64: addi
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; ELF64: addi
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; ELF64: std
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ret void
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}
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define void @t11(float %v) nounwind uwtable ssp {
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; ELF64: t11
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%1 = fadd float %v, 1.0
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store float %1, float* @e, align 4
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; ELF64: fadds
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; ELF64: stfs
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ret void
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}
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define void @t12(double %v) nounwind uwtable ssp {
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; ELF64: t12
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%1 = fadd double %v, 1.0
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store double %1, double* @f, align 8
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; ELF64: fadd
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; ELF64: stfd
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ret void
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}
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;; lwa requires an offset divisible by 4, so we need lwax here.
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define i64 @t13() nounwind uwtable ssp {
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; ELF64: t13
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%1 = load i32* getelementptr inbounds (%struct.s* @g, i32 0, i32 1), align 1
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%2 = sext i32 %1 to i64
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; ELF64: li
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; ELF64: lwax
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%3 = add nsw i64 %2, 1
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; ELF64: addi
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ret i64 %3
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}
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;; ld requires an offset divisible by 4, so we need ldx here.
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define i64 @t14() nounwind uwtable ssp {
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; ELF64: t14
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%1 = load i64* getelementptr inbounds (%struct.t* @h, i32 0, i32 1), align 1
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; ELF64: li
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; ELF64: ldx
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%2 = add nsw i64 %1, 1
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; ELF64: addi
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ret i64 %2
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}
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;; std requires an offset divisible by 4, so we need stdx here.
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define void @t15(i64 %v) nounwind uwtable ssp {
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; ELF64: t15
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%1 = add nsw i64 %v, 1
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store i64 %1, i64* getelementptr inbounds (%struct.t* @h, i32 0, i32 1), align 1
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; ELF64: addis
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; ELF64: addi
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; ELF64: addi
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; ELF64: li
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; ELF64: stdx
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ret void
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}
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;; ld requires an offset that fits in 16 bits, so we need ldx here.
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define i64 @t16() nounwind uwtable ssp {
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; ELF64: t16
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%1 = load i64* getelementptr inbounds ([8192 x i64]* @i, i32 0, i64 5000), align 8
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; ELF64: lis
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; ELF64: ori
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; ELF64: ldx
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%2 = add nsw i64 %1, 1
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; ELF64: addi
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ret i64 %2
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}
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;; std requires an offset that fits in 16 bits, so we need stdx here.
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define void @t17(i64 %v) nounwind uwtable ssp {
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; ELF64: t17
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%1 = add nsw i64 %v, 1
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store i64 %1, i64* getelementptr inbounds ([8192 x i64]* @i, i32 0, i64 5000), align 8
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; ELF64: addis
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; ELF64: ld
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; ELF64: addi
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; ELF64: lis
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; ELF64: ori
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; ELF64: stdx
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ret void
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}
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