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llvm-6502/lib/Target/XCore
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Richard Osborne 970a479c02 [XCore] Add missing l2rus instructions. 
These instructions are not targeted by the compiler but they are
needed for the MC layer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173634 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-27 22:28:30 +00:00
..
Disassembler [XCore] Add missing l2rus instructions. 2013-01-27 22:28:30 +00:00
InstPrinter Simplify assertion in XCoreInstPrinter. 2012-12-17 12:13:46 +00:00
MCTargetDesc Resort the #include lines in include/... and lib/... with the 2013-01-02 10:22:59 +00:00
TargetInfo Move all of the header files which are involved in modelling the LLVM IR 2013-01-02 11:36:10 +00:00
CMakeLists.txt Add instruction encodings and disassembly for 1r instructions. 2012-12-16 17:37:34 +00:00
LLVMBuild.txt Add XCore disassembler. 2012-12-16 17:29:14 +00:00
Makefile Add instruction encodings and disassembly for 1r instructions. 2012-12-16 17:37:34 +00:00
README.txt
XCore.h
XCore.td
XCoreAsmPrinter.cpp Last in the series of removing unnecessary '0' arguments for 2013-01-09 03:52:05 +00:00
XCoreCallingConv.td
XCoreFrameLowering.cpp Move all of the header files which are involved in modelling the LLVM IR 2013-01-02 11:36:10 +00:00
XCoreFrameLowering.h
XCoreInstrFormats.td Add instruction encodings / disassembly support for l4r instructions. 2013-01-25 21:55:32 +00:00
XCoreInstrInfo.cpp
XCoreInstrInfo.h
XCoreInstrInfo.td [XCore] Add missing l2rus instructions. 2013-01-27 22:28:30 +00:00
XCoreISelDAGToDAG.cpp Fix order of operands for crc8_l4r 2013-01-25 21:20:28 +00:00
XCoreISelLowering.cpp Fix order of operands for crc8_l4r 2013-01-25 21:20:28 +00:00
XCoreISelLowering.h Fix order of operands for crc8_l4r 2013-01-25 21:20:28 +00:00
XCoreMachineFunctionInfo.cpp
XCoreMachineFunctionInfo.h
XCoreMCInstLower.cpp Update comments to match recommended doxygen style. 2012-12-17 12:13:41 +00:00
XCoreMCInstLower.h Update comments to match recommended doxygen style. 2012-12-17 12:13:41 +00:00
XCoreRegisterInfo.cpp Use the correct format in the STW / SETPSC instruction names. 2013-01-25 21:25:12 +00:00
XCoreRegisterInfo.h
XCoreRegisterInfo.td Add instruction encodings and disassembly for 1r instructions. 2012-12-16 17:37:34 +00:00
XCoreSelectionDAGInfo.cpp
XCoreSelectionDAGInfo.h
XCoreSubtarget.cpp
XCoreSubtarget.h
XCoreTargetMachine.cpp Switch TargetTransformInfo from an immutable analysis pass that requires 2013-01-07 01:37:14 +00:00
XCoreTargetMachine.h Switch TargetTransformInfo from an immutable analysis pass that requires 2013-01-07 01:37:14 +00:00
XCoreTargetObjectFile.cpp
XCoreTargetObjectFile.h

README.txt 

To-do
-----

* Instruction encodings
* Tailcalls
* Investigate loop alignment
* Add builtins