Juergen Ributzka 52e0f75f82 [FastISel][AArch64] Follow-up fix for "Fix shift-immediate emission for "zero" shifts." ... Shifts also perform sign-/zero-extends to larger types, which requires us to emit an integer extend instead of a simple COPY. Related to PR21594. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222257 91177308-0d34-0410-b5e6-96231b3b80d8		2014-11-18 21:20:17 +00:00
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AArch64	[FastISel][AArch64] Follow-up fix for "Fix shift-immediate emission for "zero" shifts."	2014-11-18 21:20:17 +00:00
ARM	Fix ARM triple parsing	2014-11-17 14:08:57 +00:00
CPP
Generic
Hexagon
Inputs
Mips	First stage of call lowering for Mips fast-isel	2014-11-13 23:37:45 +00:00
MSP430
NVPTX
PowerPC	[PowerPC] Add VSX builtins for vec_div	2014-11-14 12:10:40 +00:00
R600	R600/SI: Move SIFixSGPRCopies to inst selector passes	2014-11-18 21:06:58 +00:00
SPARC
SystemZ
Thumb	[Thumb1] Re-write emitThumbRegPlusImmediate	2014-11-17 11:18:10 +00:00
Thumb2	ARM: allow constpool entry to be moved to the user's block in all cases.	2014-11-13 17:58:53 +00:00
X86	[X86] Use ADD/SUB instead of INC/DEC for Haswell and Broadwell CPUs	2014-11-17 16:17:51 +00:00
XCore