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532dc2e1f2
register ordering, for both physical and virtual registers. Update the PPC target lowering for calls to expect registers for the call result to already be in target order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38471 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
CallingConvLower.cpp | ||
DAGCombiner.cpp | ||
LegalizeDAG.cpp | ||
Makefile | ||
ScheduleDAG.cpp | ||
ScheduleDAGList.cpp | ||
ScheduleDAGRRList.cpp | ||
ScheduleDAGSimple.cpp | ||
SelectionDAG.cpp | ||
SelectionDAGISel.cpp | ||
SelectionDAGPrinter.cpp | ||
TargetLowering.cpp |