llvm-6502/test/CodeGen
Dan Gohman 532dc2e1f2 Change getCopyToParts and getCopyFromParts to always use target-endian
register ordering, for both physical and virtual registers. Update the PPC
target lowering for calls to expect registers for the call result to
already be in target order.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38471 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-09 20:59:04 +00:00
..
Alpha Convert .cvsignore files 2007-06-29 16:35:07 +00:00
ARM Add explicit triples to these tests so that llc behaves as expected on 2007-07-09 13:42:32 +00:00
CBackend Convert .cvsignore files 2007-06-29 16:35:07 +00:00
Generic remove this bogus t-t 2007-07-09 17:31:07 +00:00
IA64 Convert .cvsignore files 2007-06-29 16:35:07 +00:00
PowerPC Change getCopyToParts and getCopyFromParts to always use target-endian 2007-07-09 20:59:04 +00:00
SPARC Convert .cvsignore files 2007-06-29 16:35:07 +00:00
X86 force a cpu without SSE 2007-07-09 17:35:18 +00:00