Rafael Espindola 5356e75b5b Implement the missing bits corresponding to .mips_hack_elf_flags. ... These were: * noreorder handling on the target object streamer and asm parser. * setting the initial flag bits based on the enabled features. * setting the elf header flag for micromips It is *really* depressing I am the one doing this instead of someone at mips actually taking the time to understand the infrastructure. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200138 91177308-0d34-0410-b5e6-96231b3b80d8		2014-01-26 06:57:13 +00:00
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AArch64	[AArch64 NEON] Accept both #0.0 and #0 for comparing with floating point zero in asm parser.	2014-01-20 02:14:05 +00:00
ARM	Reverting r199886 (Prevent repetitive warnings for unrecognized processors and features)	2014-01-25 16:56:18 +00:00
AsmParser	Mark the 64-bit x86 push/pop instructions as In64BitMode. Mark the corresponding 32-bit versions with the same encodings Not64BitMode. Remove hack from tablegen disassembler table emitter. Fix bad test.	2014-01-05 01:35:51 +00:00
COFF	Fix known typos	2014-01-24 17:20:08 +00:00
Disassembler	[Sparc] Correct quad register list in the asm parser.	2014-01-24 05:24:01 +00:00
ELF	Forgot to add testcase for r198590	2014-01-21 20:39:11 +00:00
MachO	Fix known typos	2014-01-24 17:20:08 +00:00
Markup	MC: Simple example parser for MC assembly markup.	2012-10-31 23:24:13 +00:00
Mips	Implement the missing bits corresponding to .mips_hack_elf_flags.	2014-01-26 06:57:13 +00:00
PowerPC	Convert another llc -filetype=obj test.	2013-10-28 22:17:19 +00:00
Sparc	[Sparc] Add support for sparc relocation types in ELF object file.	2014-01-26 03:21:28 +00:00
SystemZ	[SystemZ] Add MC support for interlocked-access 1 instructions	2013-12-24 15:14:05 +00:00
X86	Update the X86 assembler for .intel_syntax to produce an error for invalid base	2014-01-23 22:34:42 +00:00