Roman Divacky 536a88ad5b When creating MCAsmBackend pass the CPU string as well. In X86AsmBackend ... store this and use it to not emit long nops when the CPU is geode which doesnt support them. Fixes PR11212. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164132 91177308-0d34-0410-b5e6-96231b3b80d8		2012-09-18 16:08:49 +00:00
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ARMAddressingModes.h	Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.	2012-02-18 12:03:15 +00:00
ARMAsmBackend.cpp	When creating MCAsmBackend pass the CPU string as well. In X86AsmBackend	2012-09-18 16:08:49 +00:00
ARMBaseInfo.h	Remove getARMRegisterNumbering and replace with calls into	2012-08-09 22:10:21 +00:00
ARMELFObjectWriter.cpp	Fix Thumb2 fixup kind in the integrated-as.	2012-09-01 15:06:36 +00:00
ARMFixupKinds.h	Ensure conditional BL instructions for ARM are given the fixup fixup_arm_condbranch.	2012-03-30 09:15:32 +00:00
ARMMachObjectWriter.cpp	Remove redundant semicolons which are null statements.	2012-09-10 21:26:47 +00:00
ARMMCAsmInfo.cpp	MC: Overhaul handling of .lcomm	2012-09-07 17:25:13 +00:00
ARMMCAsmInfo.h	Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.	2012-02-18 12:03:15 +00:00
ARMMCCodeEmitter.cpp	Use LLVM_DELETED_FUNCTION in place of 'DO NOT IMPLEMENT' comments.	2012-09-15 17:09:36 +00:00
ARMMCExpr.cpp	Convert assert(0) to llvm_unreachable	2012-02-07 02:50:20 +00:00
ARMMCExpr.h	Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.	2012-02-18 12:03:15 +00:00
ARMMCTargetDesc.cpp	- thumbv6 shouldn't imply +thumb2. Cortex-M0 doesn't suppport 32-bit Thumb2	2012-04-27 01:27:19 +00:00
ARMMCTargetDesc.h	When creating MCAsmBackend pass the CPU string as well. In X86AsmBackend	2012-09-18 16:08:49 +00:00
CMakeLists.txt	Hopefully fix the cmake build.	2011-12-22 01:11:01 +00:00
LLVMBuild.txt	LLVMBuild: Remove trailing newline, which irked me.	2011-12-12 19:48:00 +00:00
Makefile