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https://github.com/c64scene-ar/llvm-6502.git
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53727fc659
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137861 91177308-0d34-0410-b5e6-96231b3b80d8
50 lines
1.8 KiB
ArmAsm
50 lines
1.8 KiB
ArmAsm
@ RUN: llvm-mc -triple=thumbv6-apple-darwin -show-encoding < %s | FileCheck %s
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.syntax unified
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.globl _func
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@ Check that the assembler can handle the documented syntax from the ARM ARM.
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@ For complex constructs like shifter operands, check more thoroughly for them
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@ once then spot check that following instructions accept the form generally.
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@ This gives us good coverage while keeping the overall size of the test
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@ more reasonable.
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_func:
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@ CHECK: _func
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@------------------------------------------------------------------------------
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@ ADC (register)
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@------------------------------------------------------------------------------
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adcs r4, r6
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@ CHECK: adcs r4, r6 @ encoding: [0x74,0x41]
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@------------------------------------------------------------------------------
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@ ADD (immediate)
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@------------------------------------------------------------------------------
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adds r1, r2, #3
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adds r2, #3
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adds r2, #8
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@ CHECK: adds r1, r2, #3 @ encoding: [0xd1,0x1c]
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@ CHECK: adds r2, r2, #3 @ encoding: [0xd2,0x1c]
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@ CHECK: adds r2, #8 @ encoding: [0x08,0x32]
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@------------------------------------------------------------------------------
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@ ADD (register)
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@------------------------------------------------------------------------------
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adds r1, r2, r3
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add r2, r8
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@ CHECK: adds r1, r2, r3 @ encoding: [0xd1,0x18]
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@ CHECK: add r2, r8 @ encoding: [0x42,0x44]
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@------------------------------------------------------------------------------
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@ FIXME: ADD (SP plus immediate)
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@------------------------------------------------------------------------------
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@------------------------------------------------------------------------------
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@ FIXME: ADD (SP plus register)
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@------------------------------------------------------------------------------
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