llvm-6502/test/CodeGen/Mips/mips64ext.ll
Akira Hatanaka ef43c2de86 32-to-64-bit sext_inreg pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147004 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20 22:40:40 +00:00

20 lines
477 B
LLVM

; RUN: llc < %s -march=mips64el -mcpu=mips64 -mattr=n64 | FileCheck %s
define i64 @zext64_32(i32 %a) nounwind readnone {
entry:
; CHECK: addiu $[[R0:[0-9]+]], ${{[0-9]+}}, 2
; CHECK: dsll $[[R1:[0-9]+]], $[[R0]], 32
; CHECK: dsrl ${{[0-9]+}}, $[[R1]], 32
%add = add i32 %a, 2
%conv = zext i32 %add to i64
ret i64 %conv
}
define i64 @sext64_32(i32 %a) nounwind readnone {
entry:
; CHECK: sll ${{[0-9]+}}, ${{[0-9]+}}, 0
%conv = sext i32 %a to i64
ret i64 %conv
}