Bill Schmidt 53b0b0e754 Large code model support for PowerPC. ... Large code model is identical to medium code model except that the addis/addi sequence for "local" accesses is never used. All accesses use the addis/ld sequence. The coding changes are straightforward; most of the patch is taken up with creating variants of the medium model tests for large model. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175767 91177308-0d34-0410-b5e6-96231b3b80d8		2013-02-21 17:12:27 +00:00
..
AArch64
ARM	DAGCombiner: Fold pointless truncate, bitcast, buildvector series	2013-02-20 21:33:32 +00:00
CPP
Generic
Hexagon	Hexagon: Move HexagonMCInst.h to MCTargetDesc/HexagonMCInst.h.	2013-02-20 16:13:27 +00:00
MBlaze
Mips	Expand the sel pseudo/macro. This generates basic blocks where previously	2013-02-21 04:22:38 +00:00
MSP430
NVPTX
PowerPC	Large code model support for PowerPC.	2013-02-21 17:12:27 +00:00
R600	R600: Fix for Unigine when MachineSched is enabled	2013-02-21 15:06:59 +00:00
SI
SPARC
Thumb	Fix thumbv5e frame lowering assertion failure.	2013-02-20 12:21:33 +00:00
Thumb2	ARM: Allocation hints must make sure to be in the alloc order.	2013-02-19 18:55:36 +00:00
X86	DAGCombiner: Make the post-legalize vector op optimization more aggressive.	2013-02-21 15:24:35 +00:00
XCore