Andrea Di Biagio 53daaff125 [X86] Improved lowering of v4x32 build_vector dag nodes. ... This patch improves the lowering of v4f32 and v4i32 build_vector dag nodes that are known to have at least two non-zero elements. With this patch, a build_vector that performs a blend with zero is converted into a shuffle. This is done to let the shuffle legalizer expand the dag node in a optimal way. For example, if we know that a build_vector performs a blend with zero, we can try to lower it as a movq/blend instead of always selecting an insertps. This patch also improves the logic that lowers a build_vector into a insertps with zero masking. See for example the extra test cases added to test sse41.ll. Differential Revision: http://reviews.llvm.org/D6311 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222375 91177308-0d34-0410-b5e6-96231b3b80d8		2014-11-19 19:34:29 +00:00
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Analysis	AliasSetTracker: UnknownInsts should contribute to the refcount	2014-11-19 09:41:05 +00:00
AsmParser
Bitcode
CodeGen	[X86][SSE] pslldq/psrldq byte shifts/rotation for SSE2	2014-11-19 10:06:49 +00:00
DebugInfo
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IRReader
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Support	[ADT] Fix PR20728 - Incorrect APFloat::fusedMultiplyAdd results for x86_fp80.	2014-11-19 19:15:41 +00:00
TableGen
Target	[X86] Improved lowering of v4x32 build_vector dag nodes.	2014-11-19 19:34:29 +00:00
Transforms	Vectorize a reduction chain feeding into a 'return' statement.	2014-11-19 16:07:38 +00:00
CMakeLists.txt
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