Evan Cheng bbc726d624 Fix a minor bug in two-address pass. It was missing a commute opportunity. ... regB = move RCX regA = op regB, regC RAX = move regA where both regB and regC are killed. If regB is constrainted to non-compatible physical registers but regC is not constrainted at all, then it's better to commute the instruction. movl %edi, %eax shlq $32, %rcx leaq (%rcx,%rax), %rax => movl %edi, %eax shlq $32, %rcx orq %rcx, %rax rdar://8762995 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121793 91177308-0d34-0410-b5e6-96231b3b80d8		2010-12-14 21:34:53 +00:00
..
Alpha
ARM	bfi A, (and B, C1), C2) -> bfi A, B, C2 iff C1 & C2 == C1. rdar://8458663	2010-12-14 03:22:07 +00:00
Blackfin
CBackend
CellSPU
CPP
Generic
MBlaze	Missed some ADDI <-> ADDIK conversions in 121649.	2010-12-12 22:53:14 +00:00
Mips
MSP430
PowerPC
PTX
SPARC
SystemZ
Thumb
Thumb2	Remove the rest of the *_sfp Neon instruction patterns.	2010-12-13 23:02:37 +00:00
X86	Fix a minor bug in two-address pass. It was missing a commute opportunity.	2010-12-14 21:34:53 +00:00
XCore
thumb2-mul.ll