Elena Demikhovsky 53fb369429 AVX-512: Add assembly parser support for Rounding mode ... By Asaf Badouh <asaf.badouh@intel.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230962 91177308-0d34-0410-b5e6-96231b3b80d8		2015-03-02 15:00:34 +00:00
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AArch64	[opaque pointer type] Add textual IR support for explicit type parameter to load instruction	2015-02-27 21:17:42 +00:00
ARM	[opaque pointer type] Add textual IR support for explicit type parameter to load instruction	2015-02-27 21:17:42 +00:00
AsmParser	MC: Don't emit .no_dead_strip on targets which don't support it	2014-12-24 04:11:42 +00:00
COFF	[opaque pointer type] Add textual IR support for explicit type parameter to load instruction	2015-02-27 21:17:42 +00:00
Disassembler	[X86] Fix diassembler crash on AVX512 cmpps/cmppd with immediate that doesn't fit in 5-bits. Fixes PR22743.	2015-03-02 00:22:29 +00:00
ELF	MC: Allow multiple comma-separated expressions on the .uleb128 directive.	2015-02-19 20:24:04 +00:00
Hexagon	[Hexagon] Updating predicate register transfers and adding tstbit to allow select selection. Updating ll tests with predicate transfers that previously had nop encodings.	2014-12-09 18:16:49 +00:00
MachO	[opaque pointer type] Add textual IR support for explicit type parameter to load instruction	2015-02-27 21:17:42 +00:00
Markup
Mips	[opaque pointer type] Add textual IR support for explicit type parameter to load instruction	2015-02-27 21:17:42 +00:00
PowerPC	[PowerPC] Add support for the QPX vector instruction set	2015-02-25 01:06:45 +00:00
R600	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
Sparc
SystemZ	[SystemZ] Support all TLS access models - MC part	2015-02-18 09:11:36 +00:00
X86	AVX-512: Add assembly parser support for Rounding mode	2015-03-02 15:00:34 +00:00