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3e74d6fdd2
These are strictly utilities for registering targets and components. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138450 91177308-0d34-0410-b5e6-96231b3b80d8
85 lines
3.1 KiB
C++
85 lines
3.1 KiB
C++
//===-- PTXTargetMachine.cpp - Define TargetMachine for PTX ---------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// Top-level implementation for the PTX target.
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//
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//===----------------------------------------------------------------------===//
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#include "PTX.h"
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#include "PTXTargetMachine.h"
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#include "llvm/PassManager.h"
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#include "llvm/Support/TargetRegistry.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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namespace llvm {
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MCStreamer *createPTXAsmStreamer(MCContext &Ctx, formatted_raw_ostream &OS,
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bool isVerboseAsm, bool useLoc,
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bool useCFI,
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MCInstPrinter *InstPrint,
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MCCodeEmitter *CE,
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MCAsmBackend *MAB,
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bool ShowInst);
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}
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extern "C" void LLVMInitializePTXTarget() {
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RegisterTargetMachine<PTX32TargetMachine> X(ThePTX32Target);
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RegisterTargetMachine<PTX64TargetMachine> Y(ThePTX64Target);
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TargetRegistry::RegisterAsmStreamer(ThePTX32Target, createPTXAsmStreamer);
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TargetRegistry::RegisterAsmStreamer(ThePTX64Target, createPTXAsmStreamer);
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}
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namespace {
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const char* DataLayout32 =
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"e-p:32:32-i64:32:32-f64:32:32-v128:32:128-v64:32:64-n32:64";
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const char* DataLayout64 =
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"e-p:64:64-i64:32:32-f64:32:32-v128:32:128-v64:32:64-n32:64";
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}
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// DataLayout and FrameLowering are filled with dummy data
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PTXTargetMachine::PTXTargetMachine(const Target &T,
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StringRef TT, StringRef CPU, StringRef FS,
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Reloc::Model RM, CodeModel::Model CM,
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bool is64Bit)
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: LLVMTargetMachine(T, TT, CPU, FS, RM, CM),
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DataLayout(is64Bit ? DataLayout64 : DataLayout32),
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Subtarget(TT, CPU, FS, is64Bit),
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FrameLowering(Subtarget),
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InstrInfo(*this),
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TLInfo(*this) {
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}
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PTX32TargetMachine::PTX32TargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS,
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Reloc::Model RM, CodeModel::Model CM)
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: PTXTargetMachine(T, TT, CPU, FS, RM, CM, false) {
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}
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PTX64TargetMachine::PTX64TargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS,
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Reloc::Model RM, CodeModel::Model CM)
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: PTXTargetMachine(T, TT, CPU, FS, RM, CM, true) {
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}
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bool PTXTargetMachine::addInstSelector(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel) {
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PM.add(createPTXISelDag(*this, OptLevel));
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return false;
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}
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bool PTXTargetMachine::addPostRegAlloc(PassManagerBase &PM,
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CodeGenOpt::Level OptLevel) {
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// PTXMFInfoExtract must after register allocation!
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PM.add(createPTXMFInfoExtract(*this, OptLevel));
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return false;
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}
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