llvm-6502/test/CodeGen
Matt Arsenault 5435c66a33 R600/SI: Add strict check lines to div_scale tests.
This has weird operand requirements so it's worthwhile
to have very strict checks for its operands.

Add different combinations of SGPR operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218535 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-26 17:55:11 +00:00
..
AArch64 Revert patch of r218493, delete the test case 2014-09-26 02:40:54 +00:00
ARM Fix swift-atomics testcase 2014-09-23 23:18:01 +00:00
CPP
Generic
Hexagon Add missing attributes !cmp.[eq,gt,gtu] instructions. 2014-09-25 13:09:54 +00:00
Inputs
Mips Add the first backend support for on demand subtarget creation 2014-09-26 01:44:08 +00:00
MSP430
NVPTX
PowerPC [Power] Use AtomicExpandPass for fence insertion, and use lwsync where appropriate 2014-09-23 20:46:49 +00:00
R600 R600/SI: Add strict check lines to div_scale tests. 2014-09-26 17:55:11 +00:00
SPARC
SystemZ
Thumb [Thumb] Make load/store optimizer less conservative. 2014-09-24 16:35:50 +00:00
Thumb2
X86 [x86] In the new vector shuffle lowering, when trying to do another 2014-09-26 17:24:26 +00:00
XCore