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llvm-6502/lib/Target/ARM/Disassembler
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Bill Wendling 73fe34a3ee Encode the multi-load/store instructions with their respective modes ('ia', 
'db', 'ib', 'da') instead of having that mode as a separate field in the
instruction. It's more convenient for the asm parser and much more readable for
humans.
<rdar://problem/8654088>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119310 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-16 01:16:36 +00:00
..
ARMDisassembler.cpp Add support to match @llvm.prefetch to pld / pldw / pli. rdar://8601536. 2010-11-03 05:14:24 +00:00
ARMDisassembler.h
ARMDisassemblerCore.cpp Encode the multi-load/store instructions with their respective modes ('ia', 2010-11-16 01:16:36 +00:00
ARMDisassemblerCore.h
CMakeLists.txt MSVC hangs on compilation of ARMDisassembler.cpp. PR6866 applied to ARM target. 2010-10-11 11:36:19 +00:00
Makefile
ThumbDisassemblerCore.h Encode the multi-load/store instructions with their respective modes ('ia', 2010-11-16 01:16:36 +00:00