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llvm-6502/include/llvm/Target
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Jakob Stoklund Olesen 26207e5bf1 Introduce the TargetInstrInfo::KILL machine instruction and get rid of the 
unused DECLARE instruction.

KILL is not yet used anywhere, it will replace TargetInstrInfo::IMPLICIT_DEF
in the places where IMPLICIT_DEF is just used to alter liveness of physical
registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83006 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-28 20:32:26 +00:00
..
SubtargetFeature.h Switch SubtargetFeature off of ostreams 2009-08-23 21:41:43 +00:00
Target.td Introduce the TargetInstrInfo::KILL machine instruction and get rid of the 2009-09-28 20:32:26 +00:00
TargetAsmParser.h Added the ParseInstruction() hook for target specific assembler directives so 2009-09-10 20:51:44 +00:00
TargetCallingConv.td
TargetData.h Try again at privatizing the layout info map, with a rewritten patch. 2009-08-21 19:59:12 +00:00
TargetELFWriterInfo.h
TargetFrameInfo.h Use explicit structs instead of std::pair to map callee saved regs to spill slots. 2009-09-27 17:58:47 +00:00
TargetInstrDesc.h
TargetInstrInfo.h Introduce the TargetInstrInfo::KILL machine instruction and get rid of the 2009-09-28 20:32:26 +00:00
TargetInstrItineraries.h Make the end-of-itinerary mark explicit. Some cleanup. 2009-09-24 20:22:50 +00:00
TargetIntrinsicInfo.h
TargetJITInfo.h
TargetLowering.h Update comments. 2009-09-19 10:08:51 +00:00
TargetLoweringObjectFile.h pass machinemoduleinfo down into getSymbolForDwarfGlobalReference, 2009-09-17 18:49:52 +00:00
TargetMachine.h Rename TargetAsmInfo (and its subclasses) to MCAsmInfo. 2009-08-22 20:48:53 +00:00
TargetMachOWriterInfo.h
TargetOptions.h Implement the JIT side of the GDB JIT debugging interface. To enable this 2009-09-20 23:52:43 +00:00
TargetRegisterInfo.h eliminate the TargetRegisterDesc::AsmName field, the asmprinters now have this table. 2009-09-13 22:45:04 +00:00
TargetRegistry.h remove a dead method. 2009-09-20 22:46:42 +00:00
TargetSchedule.td Fix apostrophos. 2009-09-15 15:08:33 +00:00
TargetSelect.h
TargetSelectionDAG.td Add a new "SDTCisVec" SDTypeConstraint. This complements the vAny type. 2009-08-12 22:30:59 +00:00
TargetSubtarget.h Use the schedule itinerary operand use/def cycle information to adjust dependence edge latency for post-RA scheduling. 2009-08-19 16:08:58 +00:00