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391c5d231a
an argument to every operand printing function. Requires some slight tweaks to x86, the only user. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24541 91177308-0d34-0410-b5e6-96231b3b80d8
393 lines
14 KiB
C++
393 lines
14 KiB
C++
//===- AsmWriterEmitter.cpp - Generate an assembly writer -----------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This tablegen backend is emits an assembly printer for the current target.
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// Note that this is currently fairly skeletal, but will grow over time.
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//
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//===----------------------------------------------------------------------===//
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#include "AsmWriterEmitter.h"
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#include "CodeGenTarget.h"
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#include "Record.h"
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#include <algorithm>
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#include <ostream>
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using namespace llvm;
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static bool isIdentChar(char C) {
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return (C >= 'a' && C <= 'z') ||
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(C >= 'A' && C <= 'Z') ||
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(C >= '0' && C <= '9') ||
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C == '_';
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}
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namespace {
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struct AsmWriterOperand {
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enum { isLiteralTextOperand, isMachineInstrOperand } OperandType;
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/// Str - For isLiteralTextOperand, this IS the literal text. For
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/// isMachineInstrOperand, this is the PrinterMethodName for the operand.
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std::string Str;
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/// MiOpNo - For isMachineInstrOperand, this is the operand number of the
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/// machine instruction.
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unsigned MIOpNo;
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AsmWriterOperand(const std::string &LitStr)
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: OperandType(isLiteralTextOperand), Str(LitStr) {}
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AsmWriterOperand(const std::string &Printer, unsigned OpNo)
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: OperandType(isMachineInstrOperand), Str(Printer), MIOpNo(OpNo) {}
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bool operator!=(const AsmWriterOperand &Other) const {
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if (OperandType != Other.OperandType || Str != Other.Str) return true;
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if (OperandType == isMachineInstrOperand)
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return MIOpNo != Other.MIOpNo;
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return false;
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}
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bool operator==(const AsmWriterOperand &Other) const {
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return !operator!=(Other);
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}
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void EmitCode(std::ostream &OS) const;
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};
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struct AsmWriterInst {
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std::vector<AsmWriterOperand> Operands;
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const CodeGenInstruction *CGI;
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AsmWriterInst(const CodeGenInstruction &CGI, unsigned Variant);
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/// MatchesAllButOneOp - If this instruction is exactly identical to the
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/// specified instruction except for one differing operand, return the
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/// differing operand number. Otherwise return ~0.
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unsigned MatchesAllButOneOp(const AsmWriterInst &Other) const;
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private:
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void AddLiteralString(const std::string &Str) {
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// If the last operand was already a literal text string, append this to
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// it, otherwise add a new operand.
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if (!Operands.empty() &&
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Operands.back().OperandType == AsmWriterOperand::isLiteralTextOperand)
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Operands.back().Str.append(Str);
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else
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Operands.push_back(AsmWriterOperand(Str));
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}
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};
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}
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void AsmWriterOperand::EmitCode(std::ostream &OS) const {
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if (OperandType == isLiteralTextOperand)
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OS << "O << \"" << Str << "\"; ";
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else
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OS << Str << "(MI, " << MIOpNo << "); ";
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}
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/// ParseAsmString - Parse the specified Instruction's AsmString into this
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/// AsmWriterInst.
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///
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AsmWriterInst::AsmWriterInst(const CodeGenInstruction &CGI, unsigned Variant) {
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this->CGI = &CGI;
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bool inVariant = false; // True if we are inside a {.|.|.} region.
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const std::string &AsmString = CGI.AsmString;
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std::string::size_type LastEmitted = 0;
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while (LastEmitted != AsmString.size()) {
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std::string::size_type DollarPos =
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AsmString.find_first_of("${|}", LastEmitted);
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if (DollarPos == std::string::npos) DollarPos = AsmString.size();
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// Emit a constant string fragment.
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if (DollarPos != LastEmitted) {
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// TODO: this should eventually handle escaping.
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AddLiteralString(std::string(AsmString.begin()+LastEmitted,
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AsmString.begin()+DollarPos));
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LastEmitted = DollarPos;
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} else if (AsmString[DollarPos] == '{') {
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if (inVariant)
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throw "Nested variants found for instruction '" +
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CGI.TheDef->getName() + "'!";
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LastEmitted = DollarPos+1;
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inVariant = true; // We are now inside of the variant!
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for (unsigned i = 0; i != Variant; ++i) {
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// Skip over all of the text for an irrelevant variant here. The
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// next variant starts at |, or there may not be text for this
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// variant if we see a }.
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std::string::size_type NP =
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AsmString.find_first_of("|}", LastEmitted);
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if (NP == std::string::npos)
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throw "Incomplete variant for instruction '" +
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CGI.TheDef->getName() + "'!";
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LastEmitted = NP+1;
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if (AsmString[NP] == '}') {
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inVariant = false; // No text for this variant.
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break;
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}
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}
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} else if (AsmString[DollarPos] == '|') {
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if (!inVariant)
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throw "'|' character found outside of a variant in instruction '"
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+ CGI.TheDef->getName() + "'!";
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// Move to the end of variant list.
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std::string::size_type NP = AsmString.find('}', LastEmitted);
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if (NP == std::string::npos)
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throw "Incomplete variant for instruction '" +
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CGI.TheDef->getName() + "'!";
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LastEmitted = NP+1;
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inVariant = false;
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} else if (AsmString[DollarPos] == '}') {
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if (!inVariant)
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throw "'}' character found outside of a variant in instruction '"
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+ CGI.TheDef->getName() + "'!";
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LastEmitted = DollarPos+1;
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inVariant = false;
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} else if (DollarPos+1 != AsmString.size() &&
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AsmString[DollarPos+1] == '$') {
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AddLiteralString("$"); // "$$" -> $
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LastEmitted = DollarPos+2;
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} else {
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// Get the name of the variable.
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std::string::size_type VarEnd = DollarPos+1;
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// handle ${foo}bar as $foo by detecting whether the character following
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// the dollar sign is a curly brace. If so, advance VarEnd and DollarPos
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// so the variable name does not contain the leading curly brace.
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bool hasCurlyBraces = false;
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if (VarEnd < AsmString.size() && '{' == AsmString[VarEnd]) {
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hasCurlyBraces = true;
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++DollarPos;
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++VarEnd;
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}
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while (VarEnd < AsmString.size() && isIdentChar(AsmString[VarEnd]))
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++VarEnd;
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std::string VarName(AsmString.begin()+DollarPos+1,
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AsmString.begin()+VarEnd);
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// In order to avoid starting the next string at the terminating curly
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// brace, advance the end position past it if we found an opening curly
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// brace.
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if (hasCurlyBraces) {
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if (VarEnd >= AsmString.size())
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throw "Reached end of string before terminating curly brace in '"
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+ CGI.TheDef->getName() + "'";
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if (AsmString[VarEnd] != '}')
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throw "Variant name beginning with '{' did not end with '}' in '"
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+ CGI.TheDef->getName() + "'";
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++VarEnd;
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}
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if (VarName.empty())
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throw "Stray '$' in '" + CGI.TheDef->getName() +
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"' asm string, maybe you want $$?";
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unsigned OpNo = CGI.getOperandNamed(VarName);
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CodeGenInstruction::OperandInfo OpInfo = CGI.OperandList[OpNo];
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// If this is a two-address instruction and we are not accessing the
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// 0th operand, remove an operand.
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unsigned MIOp = OpInfo.MIOperandNo;
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if (CGI.isTwoAddress && MIOp != 0) {
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if (MIOp == 1)
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throw "Should refer to operand #0 instead of #1 for two-address"
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" instruction '" + CGI.TheDef->getName() + "'!";
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--MIOp;
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}
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Operands.push_back(AsmWriterOperand(OpInfo.PrinterMethodName, MIOp));
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LastEmitted = VarEnd;
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}
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}
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AddLiteralString("\\n");
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}
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/// MatchesAllButOneOp - If this instruction is exactly identical to the
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/// specified instruction except for one differing operand, return the differing
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/// operand number. If more than one operand mismatches, return ~1, otherwise
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/// if the instructions are identical return ~0.
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unsigned AsmWriterInst::MatchesAllButOneOp(const AsmWriterInst &Other)const{
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if (Operands.size() != Other.Operands.size()) return ~1;
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unsigned MismatchOperand = ~0U;
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for (unsigned i = 0, e = Operands.size(); i != e; ++i) {
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if (Operands[i] != Other.Operands[i])
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if (MismatchOperand != ~0U) // Already have one mismatch?
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return ~1U;
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else
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MismatchOperand = i;
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}
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return MismatchOperand;
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}
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static void PrintCases(std::vector<std::pair<std::string,
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AsmWriterOperand> > &OpsToPrint, std::ostream &O) {
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O << " case " << OpsToPrint.back().first << ": ";
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AsmWriterOperand TheOp = OpsToPrint.back().second;
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OpsToPrint.pop_back();
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// Check to see if any other operands are identical in this list, and if so,
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// emit a case label for them.
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for (unsigned i = OpsToPrint.size(); i != 0; --i)
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if (OpsToPrint[i-1].second == TheOp) {
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O << "\n case " << OpsToPrint[i-1].first << ": ";
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OpsToPrint.erase(OpsToPrint.begin()+i-1);
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}
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// Finally, emit the code.
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TheOp.EmitCode(O);
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O << "break;\n";
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}
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/// EmitInstructions - Emit the last instruction in the vector and any other
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/// instructions that are suitably similar to it.
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static void EmitInstructions(std::vector<AsmWriterInst> &Insts,
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std::ostream &O) {
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AsmWriterInst FirstInst = Insts.back();
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Insts.pop_back();
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std::vector<AsmWriterInst> SimilarInsts;
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unsigned DifferingOperand = ~0;
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for (unsigned i = Insts.size(); i != 0; --i) {
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unsigned DiffOp = Insts[i-1].MatchesAllButOneOp(FirstInst);
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if (DiffOp != ~1U) {
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if (DifferingOperand == ~0U) // First match!
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DifferingOperand = DiffOp;
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// If this differs in the same operand as the rest of the instructions in
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// this class, move it to the SimilarInsts list.
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if (DifferingOperand == DiffOp || DiffOp == ~0U) {
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SimilarInsts.push_back(Insts[i-1]);
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Insts.erase(Insts.begin()+i-1);
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}
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}
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}
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std::string Namespace = FirstInst.CGI->Namespace;
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O << " case " << Namespace << "::"
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<< FirstInst.CGI->TheDef->getName() << ":\n";
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for (unsigned i = 0, e = SimilarInsts.size(); i != e; ++i)
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O << " case " << Namespace << "::"
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<< SimilarInsts[i].CGI->TheDef->getName() << ":\n";
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for (unsigned i = 0, e = FirstInst.Operands.size(); i != e; ++i) {
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if (i != DifferingOperand) {
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// If the operand is the same for all instructions, just print it.
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O << " ";
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FirstInst.Operands[i].EmitCode(O);
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} else {
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// If this is the operand that varies between all of the instructions,
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// emit a switch for just this operand now.
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O << " switch (MI->getOpcode()) {\n";
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std::vector<std::pair<std::string, AsmWriterOperand> > OpsToPrint;
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OpsToPrint.push_back(std::make_pair(Namespace+"::"+
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FirstInst.CGI->TheDef->getName(),
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FirstInst.Operands[i]));
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for (unsigned si = 0, e = SimilarInsts.size(); si != e; ++si) {
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AsmWriterInst &AWI = SimilarInsts[si];
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OpsToPrint.push_back(std::make_pair(Namespace+"::"+
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AWI.CGI->TheDef->getName(),
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AWI.Operands[i]));
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}
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std::reverse(OpsToPrint.begin(), OpsToPrint.end());
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while (!OpsToPrint.empty())
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PrintCases(OpsToPrint, O);
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O << " }";
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}
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O << "\n";
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}
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O << " break;\n";
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}
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void AsmWriterEmitter::run(std::ostream &O) {
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EmitSourceFileHeader("Assembly Writer Source Fragment", O);
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CodeGenTarget Target;
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Record *AsmWriter = Target.getAsmWriter();
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std::string ClassName = AsmWriter->getValueAsString("AsmWriterClassName");
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unsigned Variant = AsmWriter->getValueAsInt("Variant");
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O <<
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"/// printInstruction - This method is automatically generated by tablegen\n"
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"/// from the instruction set description. This method returns true if the\n"
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"/// machine instruction was sufficiently described to print it, otherwise\n"
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"/// it returns false.\n"
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"bool " << Target.getName() << ClassName
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<< "::printInstruction(const MachineInstr *MI) {\n";
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std::string Namespace = Target.inst_begin()->second.Namespace;
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std::vector<AsmWriterInst> Instructions;
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for (CodeGenTarget::inst_iterator I = Target.inst_begin(),
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E = Target.inst_end(); I != E; ++I)
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if (!I->second.AsmString.empty())
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Instructions.push_back(AsmWriterInst(I->second, Variant));
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// If all of the instructions start with a constant string (a very very common
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// occurance), emit all of the constant strings as a big table lookup instead
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// of requiring a switch for them.
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bool AllStartWithString = true;
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for (unsigned i = 0, e = Instructions.size(); i != e; ++i)
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if (Instructions[i].Operands.empty() ||
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Instructions[i].Operands[0].OperandType !=
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AsmWriterOperand::isLiteralTextOperand) {
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AllStartWithString = false;
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break;
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}
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if (AllStartWithString) {
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// Compute the CodeGenInstruction -> AsmWriterInst mapping. Note that not
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// all machine instructions are necessarily being printed, so there may be
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// target instructions not in this map.
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std::map<const CodeGenInstruction*, AsmWriterInst*> CGIAWIMap;
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for (unsigned i = 0, e = Instructions.size(); i != e; ++i)
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CGIAWIMap.insert(std::make_pair(Instructions[i].CGI, &Instructions[i]));
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// Emit a table of constant strings.
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std::vector<const CodeGenInstruction*> NumberedInstructions;
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Target.getInstructionsByEnumValue(NumberedInstructions);
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O << " static const char * const OpStrs[] = {\n";
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for (unsigned i = 0, e = NumberedInstructions.size(); i != e; ++i) {
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AsmWriterInst *AWI = CGIAWIMap[NumberedInstructions[i]];
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if (AWI == 0) {
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// Something not handled by the asmwriter printer.
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O << " 0,\t// ";
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} else {
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O << " \"" << AWI->Operands[0].Str << "\",\t// ";
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// Nuke the string from the operand list. It is now handled!
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AWI->Operands.erase(AWI->Operands.begin());
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}
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O << NumberedInstructions[i]->TheDef->getName() << "\n";
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}
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O << " };\n\n"
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<< " // Emit the opcode for the instruction.\n"
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<< " if (const char *AsmStr = OpStrs[MI->getOpcode()])\n"
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<< " O << AsmStr;\n\n";
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}
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// Because this is a vector we want to emit from the end. Reverse all of the
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// elements in the vector.
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std::reverse(Instructions.begin(), Instructions.end());
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O << " switch (MI->getOpcode()) {\n"
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" default: return false;\n";
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while (!Instructions.empty())
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EmitInstructions(Instructions, O);
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O << " }\n"
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" return true;\n"
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"}\n";
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}
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