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1b88927253
Mostly copy-and-paste from Sparc v8 architecture. Differential Revision: http://reviews.llvm.org/D8741 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236146 91177308-0d34-0410-b5e6-96231b3b80d8
60 lines
1.8 KiB
C++
60 lines
1.8 KiB
C++
//===-- SparcMCTargetDesc.h - Sparc Target Descriptions ---------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file provides Sparc specific target descriptions.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_SPARC_MCTARGETDESC_SPARCMCTARGETDESC_H
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#define LLVM_LIB_TARGET_SPARC_MCTARGETDESC_SPARCMCTARGETDESC_H
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#include "llvm/Support/DataTypes.h"
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namespace llvm {
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class MCAsmBackend;
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class MCCodeEmitter;
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class MCContext;
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class MCInstrInfo;
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class MCObjectWriter;
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class MCRegisterInfo;
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class MCSubtargetInfo;
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class Target;
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class StringRef;
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class raw_pwrite_stream;
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class raw_ostream;
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extern Target TheSparcTarget;
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extern Target TheSparcV9Target;
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extern Target TheSparcelTarget;
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MCCodeEmitter *createSparcMCCodeEmitter(const MCInstrInfo &MCII,
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const MCRegisterInfo &MRI,
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MCContext &Ctx);
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MCAsmBackend *createSparcAsmBackend(const Target &T, const MCRegisterInfo &MRI,
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StringRef TT, StringRef CPU);
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MCObjectWriter *createSparcELFObjectWriter(raw_pwrite_stream &OS, bool Is64Bit,
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bool IsLIttleEndian, uint8_t OSABI);
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} // End llvm namespace
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// Defines symbolic names for Sparc registers. This defines a mapping from
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// register name to register number.
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//
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#define GET_REGINFO_ENUM
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#include "SparcGenRegisterInfo.inc"
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// Defines symbolic names for the Sparc instructions.
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//
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#define GET_INSTRINFO_ENUM
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#include "SparcGenInstrInfo.inc"
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#define GET_SUBTARGETINFO_ENUM
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#include "SparcGenSubtargetInfo.inc"
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#endif
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