llvm-6502/lib/CodeGen/SelectionDAG
Andrea Di Biagio 124ce3ab36 [DAGCombiner] Fix a crash caused by a missing check for legal type when trying to fold shuffles.
Verify that DAGCombiner does not crash when trying to fold a pair of shuffles
according to rule (added at r212539):
  (shuffle (shuffle A, Undef, M0), Undef, M1) -> (shuffle A, Undef, M2)

The DAGCombiner avoids folding shuffles if the resulting shuffle dag node
is not legal for the target. That means, the resulting shuffle must have
legal type and legal mask.

Before, the DAGCombiner only called method
'TargetLowering::isShuffleMaskLegal' to check if it was "safe" to fold according
to the above-mentioned rule. However, this caused a crash in the x86 backend
since method 'isShuffleMaskLegal' always expects to be called on a
legal vector type.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212915 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-13 21:02:14 +00:00
..
CMakeLists.txt
DAGCombiner.cpp [DAGCombiner] Fix a crash caused by a missing check for legal type when trying to fold shuffles. 2014-07-13 21:02:14 +00:00
FastISel.cpp Avoid a warning from MSVC on "*/" in this code by inserting a space 2014-07-12 00:06:46 +00:00
FunctionLoweringInfo.cpp
InstrEmitter.cpp
InstrEmitter.h
LegalizeDAG.cpp ARM: Allow __fp16 as a function arg or return type for AArch64 2014-07-11 13:33:46 +00:00
LegalizeFloatTypes.cpp
LegalizeIntegerTypes.cpp Make it possible for ints/floats to return different values from getBooleanContents() 2014-07-10 10:18:12 +00:00
LegalizeTypes.cpp Make it possible for ints/floats to return different values from getBooleanContents() 2014-07-10 10:18:12 +00:00
LegalizeTypes.h [x86,SDAG] Introduce any- and sign-extend-vector-inreg nodes analogous 2014-07-10 12:32:32 +00:00
LegalizeTypesGeneric.cpp Fix ppcf128 component access on little-endian systems 2014-07-03 15:06:47 +00:00
LegalizeVectorOps.cpp [x86,SDAG] Introduce any- and sign-extend-vector-inreg nodes analogous 2014-07-10 12:32:32 +00:00
LegalizeVectorTypes.cpp [x86,SDAG] Introduce any- and sign-extend-vector-inreg nodes analogous 2014-07-10 12:32:32 +00:00
LLVMBuild.txt
Makefile
ResourcePriorityQueue.cpp Fix 'platform-specific' hyphenations 2014-06-30 18:57:16 +00:00
ScheduleDAGFast.cpp
ScheduleDAGRRList.cpp The hazard recognizer only needs a subtarget, not a target machine 2014-06-13 22:38:52 +00:00
ScheduleDAGSDNodes.cpp
ScheduleDAGSDNodes.h
ScheduleDAGVLIW.cpp The hazard recognizer only needs a subtarget, not a target machine 2014-06-13 22:38:52 +00:00
SDNodeDbgValue.h
SelectionDAG.cpp [x86,SDAG] Introduce any- and sign-extend-vector-inreg nodes analogous 2014-07-10 12:32:32 +00:00
SelectionDAGBuilder.cpp [FastISel] Make isInTailCallPosition independent of SelectionDAG. 2014-07-11 20:50:47 +00:00
SelectionDAGBuilder.h Fix 'platform-specific' hyphenations 2014-06-30 18:57:16 +00:00
SelectionDAGDumper.cpp [x86,SDAG] Introduce any- and sign-extend-vector-inreg nodes analogous 2014-07-10 12:32:32 +00:00
SelectionDAGISel.cpp Revert "Introduce a string_ostream string builder facilty" 2014-06-26 22:52:05 +00:00
SelectionDAGPrinter.cpp Revert "Introduce a string_ostream string builder facilty" 2014-06-26 22:52:05 +00:00
TargetLowering.cpp SelectionDAG: Factor FP_TO_SINT lower code out of DAGLegalizer 2014-07-10 22:40:18 +00:00
TargetSelectionDAGInfo.cpp Have TargetSelectionDAGInfo take a DataLayout initializer rather than 2014-06-06 19:04:48 +00:00