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https://github.com/c64scene-ar/llvm-6502.git
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f09378397e
per-function subtarget. Currently, code-gen passes the default or generic subtarget to the constructors of MCInstPrinter subclasses (see LLVMTargetMachine::addPassesToEmitFile), which enables some targets (AArch64, ARM, and X86) to change their instprinter's behavior based on the subtarget feature bits. Since the backend can now use different subtargets for each function, instprinter has to be changed to use the per-function subtarget rather than the default subtarget. This patch takes the first step towards enabling instprinter to change its behavior based on the per-function subtarget. It adds a bit "PassSubtarget" to AsmWriter which tells table-gen to pass a reference to MCSubtargetInfo to the various print methods table-gen auto-generates. I will follow up with changes to instprinters of AArch64, ARM, and X86. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233411 91177308-0d34-0410-b5e6-96231b3b80d8
69 lines
2.7 KiB
C++
69 lines
2.7 KiB
C++
//===- PPCInstPrinter.h - Convert PPC MCInst to assembly syntax -*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This class prints an PPC MCInst to a .s file.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_POWERPC_INSTPRINTER_PPCINSTPRINTER_H
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#define LLVM_LIB_TARGET_POWERPC_INSTPRINTER_PPCINSTPRINTER_H
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#include "llvm/MC/MCInstPrinter.h"
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namespace llvm {
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class MCOperand;
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class PPCInstPrinter : public MCInstPrinter {
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bool IsDarwin;
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public:
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PPCInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
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const MCRegisterInfo &MRI, bool isDarwin)
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: MCInstPrinter(MAI, MII, MRI), IsDarwin(isDarwin) {}
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bool isDarwinSyntax() const {
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return IsDarwin;
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}
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void printRegName(raw_ostream &OS, unsigned RegNo) const override;
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void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
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const MCSubtargetInfo &STI) override;
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// Autogenerated by tblgen.
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void printInstruction(const MCInst *MI, raw_ostream &O);
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static const char *getRegisterName(unsigned RegNo);
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void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printPredicateOperand(const MCInst *MI, unsigned OpNo,
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raw_ostream &O, const char *Modifier = nullptr);
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void printU1ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printU2ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printU3ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printU4ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printS5ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printU5ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printU6ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printU12ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printS16ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printU16ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printBranchOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printAbsBranchOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printTLSCall(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printcrbitm(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printMemRegImm(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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void printMemRegReg(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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};
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} // end namespace llvm
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#endif
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